James Cherry
|
65b6821c18
|
make timing model check for internal clocks
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-11-02 17:06:51 -07:00 |
James Cherry
|
10371720f1
|
OL1467 Segfault during writing timing model for mutlti-corner
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-11-02 13:58:10 -07:00 |
James Cherry
|
b55b5cd0f1
|
OL1404 Flow crashes during writing timing model
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-10-07 11:04:27 -07:00 |
James Cherry
|
28c8185204
|
write_timing_model -library_name
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-08-22 10:55:11 -07:00 |
James Cherry
|
a8a9b27077
|
TableAxis shared_ptr
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-25 16:31:18 -07:00 |
James Cherry
|
5a8b29d3ee
|
TimingArcAttrs
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-25 11:59:07 -07:00 |
James Cherry
|
c230ba0e1a
|
TimingArcSets share TimingArcAttrs
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-25 10:08:33 -07:00 |
James Cherry
|
158a886d94
|
timing model clk->output remove edge time
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-23 19:18:00 -07:00 |
James Cherry
|
9eaf208ee5
|
MakeTimingModel leaks
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-14 08:45:19 -07:00 |
James Cherry
|
eab1f1cc01
|
TimingArcSet::arcs() range iteration
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-12 11:47:26 -07:00 |
James Cherry
|
8c5b0fcaa5
|
LibertyCell::timingArcSets() range iteration
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-12 08:21:34 -07:00 |
James Cherry
|
ef2b2cbaa9
|
make timing model templates
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-11 17:01:11 -07:00 |
James Cherry
|
cf9e720582
|
make timing model table models
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-11 16:25:21 -07:00 |
James Cherry
|
1eb6da19e9
|
MakeTimingModel
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-11 10:48:53 -07:00 |
James Cherry
|
0c35ebde82
|
make timing model max holds
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-11 10:45:08 -07:00 |
James Cherry
|
9e15bfc395
|
make timing model setup/hold merge
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-10 17:27:57 -07:00 |
James Cherry
|
7a029217a7
|
make timing model reg->out paths
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-10 16:54:19 -07:00 |
James Cherry
|
2b498c93c4
|
write_timing_model input->output arcs
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-10 16:26:14 -07:00 |
James Cherry
|
706660a503
|
write_timing_model setup/hold search
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-10 09:39:49 -07:00 |
James Cherry
|
170e6b7a40
|
write liberty bus port
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-09 19:19:05 -07:00 |
James Cherry
|
754ab9e220
|
write_timing_model
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-08 18:54:56 -07:00 |
James Cherry
|
548ad96708
|
make timing model clk->output paths
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-08 11:37:17 -07:00 |
James Cherry
|
55ec1973d0
|
make timing model setup/hold
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-08 10:03:41 -07:00 |
James Cherry
|
f2c6b49d07
|
write_timing_model
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-08 08:29:53 -07:00 |