1806e4aede
StaTclTypes %include "std_string_view.i"
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-03-28 19:55:13 -07:00
614385fe51
Liberty unnecessary move
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-03-28 19:48:21 -07:00
6742692876
string squash
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-03-28 19:13:35 -07:00
b9e439f41c
delay calc clip delay to 0.0 resolves #405
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-03-24 18:42:47 -07:00
d233581e16
Make `wire_load_tree_` default to unknown so we can detect when it's not present in a Liberty file. ( #402 )
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This is potentially a behavior change, but I think omitting this is rare. I've only seen it in some DTCD Liberty files.
In those Liberty libraries, it seems to be expected that the Liberty data is valid for all `WireloadTree` types.
Thus it is necessary to distinguish between "wire load tree was specified as 'balanced'" and "wire load tree
was not specified".
2026-03-24 12:35:18 -07:00
464bc3ae4f
Report use string instead of string_view
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-03-18 13:01:05 -07:00
90df0cfea5
LibertyScanner includes
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-03-18 12:15:57 -07:00
134b547501
use std::format squash
2026-03-16 15:01:38 -07:00
d6e7b4256c
lvf squish
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-03-13 14:06:35 -07:00
00ee6a1956
liberty max_transition warning resolves #403
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-03-11 11:58:58 -07:00
981f44db68
update copyright
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-03-10 14:57:45 -07:00
6280635c38
liberty statetable ref test_cell ports resolves #276
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-03-10 12:58:53 -07:00
0850e97b88
readLibraryAttributes only call when non-empty library
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-03-09 18:12:56 -07:00
859982bdc7
StdStringSeq -> StringSeq
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-03-08 15:51:50 -07:00
4f540792a0
rm StringSet
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-03-08 15:39:41 -07:00
8bd938d840
CheckError use std::string
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-03-08 15:02:14 -07:00
48511e09b1
override
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-03-08 14:07:40 -07:00
a419f0a721
LibertyPortPair calls
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-03-08 13:36:54 -07:00
274637ce46
liberty attributes after cells resolves #400
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-03-08 10:21:55 -07:00
d8c0e9285b
RiseFall use shortName instead of to_string
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-03-06 12:02:05 -07:00
f1e5587fef
rapidus liberty latch D->Q/EN->Q matching
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-03-05 18:41:25 -07:00
8ed837d74b
relevelize latch EN->Q
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-03-05 13:33:58 -08:00
741bf4d561
rm using std::
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-03-02 12:13:13 -08:00
0f8d7cffd3
mv StdStringSeq defs to StringUtil.hh
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-02-28 15:53:23 -08:00
e76f54a068
rm TokenParser
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-02-28 15:45:34 -08:00
cd21c43693
rm LibertyPort::clkTreeDelays, clockTreePathDelays
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-02-28 14:57:00 -08:00
c010a0f99e
liberty reader rewrite
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-02-27 17:12:50 -08:00
4c157f46ee
InternalPower::related_pg_port string->port
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-02-11 08:33:09 -07:00
7cb71fe766
liberty memory management
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-02-04 18:33:32 -07:00
33e480a6c1
liberty memory management
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-02-04 18:33:04 -07:00
c7f4bb3bb3
Merge branch 'master' into rel_3.0
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-02-04 17:36:33 -07:00
cde32a1572
leakage power well pg pin resolves #377
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-02-04 16:50:28 -07:00
0ae888b619
Merge branch 'master' into rel_3.0
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-02-03 08:40:58 -07:00
3136871ecd
LibertyCell::isClockGateLatchNegedge resolves #375
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-02-03 08:33:46 -07:00
87ea907884
defineScalingFactorVisitors min_pulse_width resolves #376
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-02-03 08:18:41 -07:00
b04ffe737b
LibertyBuilder::makeRegLatchArcs null ref resolves #368
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-01-20 17:35:25 -07:00
d42b821c00
rel 3.0
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-01-13 09:36:45 -07:00
6ef25d488a
more unit issues
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2025-12-05 14:47:16 -07:00
e8c7a6541b
more unit fallout
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2025-12-05 09:51:15 -07:00
574379eb32
rm stray semicolon ( #338 )
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Signed-off-by: Matt Liberty <mliberty@precisioninno.com>
2025-11-21 07:01:39 -08:00
c4b94c3ee5
Add missing system header includes. ( #330 )
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Signed-off-by: Sean Luchen <seanluchen@google.com>
2025-11-17 09:23:32 -08:00
16a92707fb
Fix `isBuffer` ( #329 )
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* Add support for "well" direction type (nwell, pwell, etc.), and fix isBuffer (+ other functions) to accommodate wells
* Just fix isBuffer issue
2025-11-16 15:34:37 -08:00
cf903f4db6
suppress rapidus liberty warning
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2025-11-09 08:23:53 -07:00
8287aec5f6
Verilog make pins for liberty pg_pins resolves #326
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commit b4a89c93965c49a8685fd41cb6aee10635d7a7f3
Author: James Cherry <cherry@parallaxsw.com>
Date: Fri Nov 7 11:48:10 2025 -0700
pg_ -> PwrGnd
Signed-off-by: James Cherry <cherry@parallaxsw.com>
commit 12ddba4bf220cec8459c15e483a871b13e507bf2
Author: James Cherry <cherry@parallaxsw.com>
Date: Fri Nov 7 08:56:02 2025 -0700
pg_port
Signed-off-by: James Cherry <cherry@parallaxsw.com>
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2025-11-07 11:55:43 -07:00
351b8287a7
issue 322 revisited
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2025-11-06 12:34:53 -07:00
2412feec33
pad cells are not buffers or inverters ( #294 )
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Signed-off-by: Matt Liberty <mliberty@precisioninno.com>
2025-09-08 17:04:21 -07:00
b654fd48a8
read_liberty leak resolves ORFS#1184
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2025-08-20 16:00:33 -07:00
2e903ab4da
Allow Liberty floats as strings for `voltage_map` and `capacitive_load_unit` ( #280 )
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* Allow Liberty floats as strings for voltage_map and capacitive_load_unit
* Update liberty_float_as_str.lib
* Use valid bool
* Remove unused include
2025-08-01 17:41:56 -07:00
ec3208bfbf
Allow backslash-EOL to end tokens in Liberty file ( #279 )
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* Allow backslash EOL to end tokens in Liberty file
* Update liberty_backslash_eol.lib
* Update liberty_backslash_eol.lib
2025-07-31 12:19:36 -07:00
3620d7a259
liberty min_period timing group support resolves #275
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2025-07-27 18:12:26 -07:00
James Cherry
Robert O'Callahan
Matt Liberty
Logikable
Akash Levy
Akash Levy