James Cherry
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ca969c0e8f
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Merge branch 'master' of https://github.com/The-OpenROAD-Project/OpenSTA
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2019-11-17 09:51:53 -07:00 |
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James Cherry
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cd753929af
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SwigCleanup
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2019-11-17 09:47:53 -07:00 |
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James Cherry
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63691545c9
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Merge branch 'master' of https://github.com/The-OpenROAD-Project/OpenSTA
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2019-11-16 19:19:09 -07:00 |
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James Cherry
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d713166a48
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refactor swig init out of the library
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2019-11-16 18:11:25 -07:00 |
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James Cherry
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0f8ea9c752
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format
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2019-11-14 22:14:26 -07:00 |
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James Cherry
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a0107557d1
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make TclInitVar.cc in /build
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2019-11-14 22:12:17 -07:00 |
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James Cherry
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0c97a10f9a
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network external cell/port member vars
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2019-11-13 14:58:38 -07:00 |
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James Cherry
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c59b2db038
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build swig outputs in /build
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2019-11-12 08:29:40 -07:00 |
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James Cherry
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de50cc5d67
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rm auto's for compile time
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2019-11-11 15:53:29 -07:00 |
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James Cherry
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cc1bd6b5ab
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TransRiseFall -> RiseFall
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2019-11-11 15:30:19 -07:00 |
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James Cherry
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bdab2acb09
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use operator= instead of copy
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2019-11-11 13:03:38 -07:00 |
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James Cherry
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c018cb212b
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graph no counts needed
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2019-11-11 11:16:24 -07:00 |
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James Cherry
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3076b8d2ff
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VertexIndex -> VertexId
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2019-11-11 09:38:25 -07:00 |
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James Cherry
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e647ed391d
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dispatch queue for thread support
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2019-11-11 08:48:27 -07:00 |
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James Cherry
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184d044b02
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replace Pool with ObjectTable
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2019-11-11 08:28:42 -07:00 |
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James Cherry
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2e6de93870
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leaks
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2019-11-10 20:27:59 -07:00 |
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James Cherry
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c89e9da712
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set_input_delay/set_output_delay leaf pin iterators
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2019-11-10 17:10:26 -07:00 |
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James Cherry
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5a9c99228c
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.gitignore
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2019-11-10 15:59:19 -07:00 |
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James Cherry
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b12a89de0a
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readme
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2019-11-08 08:45:03 -07:00 |
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James Cherry
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f0e0223c7f
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netSlack
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2019-11-06 09:55:04 -07:00 |
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James Cherry
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bbdb4ea5bc
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staMain init_filename arg
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2019-11-05 16:05:52 -07:00 |
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James Cherry
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e7d8689f70
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resizer support
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2019-11-05 10:14:35 -07:00 |
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James Cherry
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6934b4ebcd
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updates for resizer
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2019-11-05 07:51:54 -07:00 |
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James Cherry
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3179c5a343
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public ensureLevelized
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2019-11-03 09:48:22 -08:00 |
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James Cherry
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84c13732f7
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Sta::makeCmdNetwork -> Sta::makeSdcNetwork
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2019-11-02 19:32:09 -07:00 |
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James Cherry
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6ac93c8c7d
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vertex_pin -> leaf_pin
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2019-10-25 08:51:59 -07:00 |
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James Cherry
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13037e6093
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rm BugLog
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2019-10-20 15:28:29 -07:00 |
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James Cherry
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56851ed438
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ssta met/violated include sigma
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2019-10-09 18:02:54 -10:00 |
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James Cherry
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81492652ce
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create_clock redef preserve propagated
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2019-10-09 18:02:33 -10:00 |
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James Cherry
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0ed0d384ac
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SwigCleanup use pragmas to disable compile warnings
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2019-10-09 18:02:02 -10:00 |
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James Cherry
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37ee851943
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sync
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2019-09-17 17:48:11 -06:00 |
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James Cherry
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2bf8b78fa5
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thread speed
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2019-09-07 12:37:05 -07:00 |
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James Cherry
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f9bc74e962
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format_distance, area
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2019-08-16 17:34:48 -07:00 |
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James Cherry
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3ae920be7d
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write_verilog escaped bus name
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2019-08-13 21:34:35 -07:00 |
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James Cherry
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3c67ef972d
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copyright
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2019-08-13 21:34:26 -07:00 |
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James Cherry
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41ebd34031
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leaks
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2019-08-12 22:56:32 -07:00 |
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James Cherry
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a20fb113b7
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gcc compile
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2019-08-12 21:36:32 -07:00 |
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James Cherry
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109925644f
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regression fast
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2019-08-09 18:44:31 -07:00 |
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James Cherry
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30a5abebc6
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Hash -> size_t
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2019-08-08 14:13:02 -07:00 |
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James Cherry
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e16696c347
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wire_load fanout_length values in quotes ucsd20190808
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2019-08-08 14:12:07 -07:00 |
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James Cherry
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73fef1117e
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copyright
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2019-07-19 07:27:59 -07:00 |
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James Cherry
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ed88ddc292
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rm DelayFloatClass
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2019-07-19 07:27:32 -07:00 |
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James Cherry
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90be94072b
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README repo url
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2019-07-19 07:17:03 -07:00 |
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James Cherry
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9d93130ff2
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range iterators
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2019-07-18 06:19:00 -07:00 |
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James Cherry
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73fb94a2dd
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set_units
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2019-07-13 16:56:46 -07:00 |
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James Cherry
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fa849908d7
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set_cmd_units
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2019-07-08 11:50:41 -07:00 |
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James Cherry
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db6b650a52
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splash include git sha1
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2019-07-07 09:58:47 -07:00 |
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James Cherry
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d7248abcab
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sdc matches for verilog port nets like \foo[2] [0]
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2019-07-04 17:26:14 -07:00 |
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James Cherry
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74e287a7eb
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write_verilog escaped bus port name "input [7:0] \in[0] ;"
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2019-07-03 21:18:38 -07:00 |
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James Cherry
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7af69066df
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VerilogWriter use liberty bus port order
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2019-07-02 16:33:31 -07:00 |