mirror of
https://github.com/The-OpenROAD-Project/OpenSTA.git
synced 2026-09-01 18:36:42 +02:00
Signed-off-by: Matt Liberty <[email protected]>
This commit is contained in:
@@ -534,7 +534,7 @@ VerilogReader::makeModuleInst(const string *module_vname,
|
||||
// to reduce the memory footprint of the verilog parser.
|
||||
if (liberty_cell
|
||||
&& hasScalarNamedPortRefs(liberty_cell, pins)) {
|
||||
int port_count = network_->portBitCount(cell);
|
||||
int port_count = liberty_cell->portBitCount();
|
||||
StdStringSeq net_names(port_count);
|
||||
for (VerilogNet *vnet : *pins) {
|
||||
VerilogNetPortRefScalarNet *vpin =
|
||||
|
||||
Reference in New Issue
Block a user