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Prefetch https://github.com/parallaxsw/OpenSTA/pull/334 

Signed-off-by: Matt Liberty <mliberty@precisioninno.com>
This commit is contained in:
Matt Liberty 2025-11-18 06:36:19 +00:00
parent 1d6e79a327
commit f72bf5ce01
1 changed files with 1 additions and 1 deletions
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2
verilog/VerilogReader.cc
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@ -534,7 +534,7 @@ VerilogReader::makeModuleInst(const string *module_vname,
// to reduce the memory footprint of the verilog parser.
if (liberty_cell
&& hasScalarNamedPortRefs(liberty_cell, pins)) {
int port_count = network_->portBitCount(cell);
int port_count = liberty_cell->portBitCount();
StdStringSeq net_names(port_count);
for (VerilogNet *vnet : *pins) {
VerilogNetPortRefScalarNet *vpin =