Merge remote-tracking branch 'upstream/master'
This commit is contained in:
commit
1d6e79a327
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@ -24,6 +24,8 @@
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#include "ArcDelayCalc.hh"
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#include <cstdlib>
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#include "Units.hh"
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#include "Liberty.hh"
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#include "TimingArc.hh"
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@ -355,8 +355,8 @@ public:
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const Network *network) = 0;
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virtual void connectPinAfter(PinSet *,
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Network *network) = 0;
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virtual void disconnectPinBefore(const Pin *pin,
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Network *network) = 0;
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virtual void deletePinBefore(const Pin *pin,
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Network *network) = 0;
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protected:
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const RiseFallBoth *rf_;
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@ -415,8 +415,8 @@ public:
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const Network *) {}
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virtual void connectPinAfter(PinSet *,
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Network *) {}
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virtual void disconnectPinBefore(const Pin *,
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Network *);
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virtual void deletePinBefore(const Pin *,
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Network *);
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void deleteInstance(const Instance *inst,
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const Network *network);
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@ -537,8 +537,8 @@ public:
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virtual size_t objectCount() const;
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virtual void connectPinAfter(PinSet *drvrs,
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Network *network);
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virtual void disconnectPinBefore(const Pin *pin,
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Network *network);
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virtual void deletePinBefore(const Pin *pin,
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Network *network);
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void deleteInstance(const Instance *inst,
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const Network *network);
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@ -1027,7 +1027,7 @@ public:
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void removeGraphAnnotations();
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// Network edit before/after methods.
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void disconnectPinBefore(const Pin *pin);
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void deletePinBefore(const Pin *pin);
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void connectPinAfter(const Pin *pin);
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void clkHpinDisablesChanged(const Pin *pin);
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void makeClkHpinDisable(const Clock *clk,
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@ -1115,6 +1115,7 @@ protected:
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void recordMergeHash(ExceptionPath *exception, ExceptionPt *missing_pt);
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void recordMergeHashes(ExceptionPath *exception);
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void unrecordExceptionFirstPts(ExceptionPath *exception);
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void unrecordExceptionPins(ExceptionPath *exception);
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void unrecordExceptionClks(ExceptionPath *exception,
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ClockSet *clks,
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ClockExceptionsMap &exception_map);
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@ -1226,7 +1226,8 @@ LibertyCell::bufferPorts(// Return values.
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}
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output = port;
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}
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else if (!dir->isPowerGround()) {
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else if (!port->isPwrGnd()) {
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// Invalid direction.
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input = nullptr;
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output = nullptr;
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break;
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@ -24,6 +24,7 @@
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#include "TableModel.hh"
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#include <cmath>
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#include <string>
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#include "Error.hh"
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@ -1166,8 +1166,8 @@ ExceptionFromTo::deleteInstance(const Instance *inst,
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}
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void
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ExceptionFromTo::disconnectPinBefore(const Pin *pin,
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Network *network)
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ExceptionFromTo::deletePinBefore(const Pin *pin,
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Network *network)
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{
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deletePin(pin, network);
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}
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@ -2080,8 +2080,8 @@ ExceptionThru::makePinEdges(const Pin *pin,
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}
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void
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ExceptionThru::disconnectPinBefore(const Pin *pin,
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Network *network)
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ExceptionThru::deletePinBefore(const Pin *pin,
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Network *network)
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{
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deletePin(pin, network);
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// Remove edges from/to leaf pin and through hier pin.
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27
sdc/Sdc.cc
27
sdc/Sdc.cc
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@ -4880,6 +4880,8 @@ Sdc::findMergeMatch(ExceptionPath *exception)
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void
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Sdc::deleteExceptions()
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{
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for (ExceptionPath *exception : exceptions_)
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delete exception;
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exceptions_.clear();
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exception_id_ = 0;
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@ -4964,6 +4966,7 @@ Sdc::unrecordException(ExceptionPath *exception)
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{
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unrecordMergeHashes(exception);
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unrecordExceptionFirstPts(exception);
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unrecordExceptionPins(exception);
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exceptions_.erase(exception);
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}
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@ -5022,6 +5025,22 @@ Sdc::unrecordExceptionFirstPts(ExceptionPath *exception)
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}
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}
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void
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Sdc::unrecordExceptionPins(ExceptionPath *exception)
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{
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ExceptionFrom *from = exception->from();
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if (from)
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unrecordExceptionPins(exception, from->pins(), pin_exceptions_);
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ExceptionThruSeq *thrus = exception->thrus();
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if (thrus) {
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for (ExceptionThru *thru : *thrus)
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unrecordExceptionPins(exception, thru->pins(), pin_exceptions_);
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}
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ExceptionTo *to = exception->to();
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if (to)
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unrecordExceptionPins(exception, to->pins(), pin_exceptions_);
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}
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void
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Sdc::unrecordExceptionClks(ExceptionPath *exception,
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ClockSet *clks,
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@ -5666,22 +5685,22 @@ Sdc::connectPinAfter(const Pin *pin)
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}
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void
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Sdc::disconnectPinBefore(const Pin *pin)
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Sdc::deletePinBefore(const Pin *pin)
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{
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auto itr = pin_exceptions_.find(pin);
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if (itr != pin_exceptions_.end()) {
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for (ExceptionPath *exception : itr->second) {
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ExceptionFrom *from = exception->from();
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if (from)
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from->disconnectPinBefore(pin, network_);
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from->deletePinBefore(pin, network_);
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ExceptionTo *to = exception->to();
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if (to)
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to->disconnectPinBefore(pin, network_);
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to->deletePinBefore(pin, network_);
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ExceptionPt *first_pt = exception->firstPt();
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ExceptionThruSeq *thrus = exception->thrus();
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if (thrus) {
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for (ExceptionThru *thru : *exception->thrus()) {
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thru->disconnectPinBefore(pin, network_);
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thru->deletePinBefore(pin, network_);
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if (thru == first_pt)
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recordExceptionEdges(exception, thru->edges(),
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first_thru_edge_exceptions_);
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@ -4477,7 +4477,6 @@ Sta::disconnectPinBefore(const Pin *pin)
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sdc_network_->pathName(pin),
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sdc_network_->pathName(network_->net(pin)));
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parasitics_->disconnectPinBefore(pin, network_);
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sdc_->disconnectPinBefore(pin);
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sim_->disconnectPinBefore(pin);
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if (graph_) {
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if (network_->isDriver(pin)) {
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@ -4663,6 +4662,7 @@ Sta::deletePinBefore(const Pin *pin)
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}
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}
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}
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sdc_->deletePinBefore(pin);
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sim_->deletePinBefore(pin);
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clk_network_->deletePinBefore(pin);
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power_->deletePinBefore(pin);
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@ -0,0 +1,59 @@
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Warning: disconnect_mcp_pin.tcl line 15, 'u0/A' is not a valid endpoint.
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Warning: disconnect_mcp_pin.tcl line 16, 'u1/A' is not a valid endpoint.
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Warning: disconnect_mcp_pin.tcl line 17, 'u0/A' is not a valid endpoint.
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Warning: disconnect_mcp_pin.tcl line 18, 'u1/A' is not a valid endpoint.
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Startpoint: data_in[1] (input port clocked by clk)
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Endpoint: u1 (falling edge-triggered data to data check clocked by clk)
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Path Group: clk
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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500.00 500.00 clock clk (rise edge)
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0.00 500.00 clock network delay (ideal)
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10.00 510.00 ^ input external delay
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0.00 510.00 ^ data_in[1] (in)
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0.00 510.00 ^ u1/A (BUFx2_ASAP7_75t_R)
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510.00 data arrival time
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750.00 750.00 clock clk (fall edge)
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0.00 750.00 clock network delay (propagated)
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0.00 750.00 clock reconvergence pessimism
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750.00 v clk (in)
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-10.00 740.00 data check setup time
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740.00 data required time
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---------------------------------------------------------
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740.00 data required time
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-510.00 data arrival time
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---------------------------------------------------------
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230.00 slack (MET)
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No paths found.
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Startpoint: data_in[1] (input port clocked by clk)
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Endpoint: u1 (falling edge-triggered data to data check clocked by clk)
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Path Group: clk
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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500.00 500.00 clock clk (rise edge)
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0.00 500.00 clock network delay (ideal)
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10.00 510.00 ^ input external delay
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0.00 510.00 ^ data_in[1] (in)
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0.00 510.00 ^ u1/A (BUFx2_ASAP7_75t_R)
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510.00 data arrival time
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750.00 750.00 clock clk (fall edge)
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0.00 750.00 clock network delay (propagated)
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0.00 750.00 clock reconvergence pessimism
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750.00 v clk (in)
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-10.00 740.00 data check setup time
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740.00 data required time
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---------------------------------------------------------
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740.00 data required time
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-510.00 data arrival time
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---------------------------------------------------------
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230.00 slack (MET)
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@ -0,0 +1,29 @@
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# disconnect/disconnect pin set_multicycle_path
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read_liberty asap7_small.lib.gz
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read_verilog disconnect_mcp_pin.v
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link_design top
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create_clock -name clk -period 500 clk
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set_input_delay -clock clk 10 data_in[*]
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# This SDC defines setup and hold time requirements for data pins
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# relative to a clock, typical for a source-synchronous interface.
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set_data_check -from clk -to [get_pins u0/A] -setup 10
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set_data_check -from clk -to [get_pins u0/A] -hold 10
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set_data_check -from clk -to [get_pins u1/A] -setup 10
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set_data_check -from clk -to [get_pins u1/A] -hold 10
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set_multicycle_path -end -setup 1 -to [get_pins u0/A]
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set_multicycle_path -end -setup 1 -to [get_pins u1/A]
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set_multicycle_path -start -hold 0 -to [get_pins u0/A]
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set_multicycle_path -start -hold 0 -to [get_pins u1/A]
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report_checks -to u1/A
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disconnect_pin data_in[1] u1/A
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report_checks -to u1/A
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connect_pin data_in[1] u1/A
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report_checks -to u1/A
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@ -0,0 +1,11 @@
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module top (clk, clkout, data_in, data_out);
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input clk;
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output clkout;
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input [1:0] data_in;
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output [1:0] data_out;
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// Anchor buffers on the source-synchronous interface IOs
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BUFx2_ASAP7_75t_R clkbuf0 (.A(clk), .Y(clkout));
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BUFx2_ASAP7_75t_R u0 (.A(data_in[0]), .Y(data_out[0]));
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BUFx2_ASAP7_75t_R u1 (.A(data_in[1]), .Y(data_out[1]));
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endmodule // top
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@ -0,0 +1 @@
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buf_inst
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@ -0,0 +1,5 @@
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# is_buffer property
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read_liberty ../examples/sky130hd_tt.lib.gz
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read_verilog get_is_buffer.v
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link_design dut
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report_object_full_names [get_cells -filter is_buffer]
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@ -0,0 +1,11 @@
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module dut (
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input A,
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output Y
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);
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sky130_fd_sc_hd__buf_2 buf_inst (
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.A(A),
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.X(Y)
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);
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endmodule
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@ -138,7 +138,9 @@ record_example_tests {
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}
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record_sta_tests {
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disconnect_mcp_pin
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get_filter
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get_is_buffer
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get_is_memory
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get_lib_pins_of_objects
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get_noargs
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