OpenRAM/compiler
Matt Guthaus ac8eada0d8 Fix devices sizes in SCMOS sense amp. Elaborate magic/netgen scripts in comments. 2018-01-24 13:02:55 -08:00
..
characterizer Move info messages about modes to better locations. 2018-01-05 08:32:23 -08:00
gdsMill Rewrite CONTRIBUTING.md to add changes relative to dev. Add small changes from orbe7947. 2017-12-12 15:50:45 -08:00
router
tests SCMOS library cells passing LVS (with property errors though). Permute must be enabled before compare, duh. 2018-01-22 17:14:39 -08:00
verify Fix devices sizes in SCMOS sense amp. Elaborate magic/netgen scripts in comments. 2018-01-24 13:02:55 -08:00
Makefile Add Makefile for parallel test execution. 2018-01-22 13:39:07 -08:00
bank.py Simplify configuration file to allow all options to be over-riden. Move default module types to options.py to simplify config file. 2018-01-19 16:38:19 -08:00
bitcell.py Add spice pruning for speed-up. Fix spice search bugs. Add time in stages to openram output. 2017-11-14 13:24:14 -08:00
bitcell_array.py Simplify configuration file to allow all options to be over-riden. Move default module types to options.py to simplify config file. 2018-01-19 16:38:19 -08:00
contact.py Added workaround to import layouts into Magic. Select and well layers in active contacts. Fixed missing implant enclose active DRC rule in parameterized cells. 2018-01-11 10:24:44 -08:00
control_logic.py Simplify configuration file to allow all options to be over-riden. Move default module types to options.py to simplify config file. 2018-01-19 16:38:19 -08:00
debug.py Improve global and code structure using modules. 2017-11-16 13:52:58 -08:00
delay_chain.py Simplify configuration file to allow all options to be over-riden. Move default module types to options.py to simplify config file. 2018-01-19 16:38:19 -08:00
design.py Rewrite the parameterized transistor and gate classes. 2017-12-12 15:04:01 -08:00
example_config_freepdk45.py Simplify configuration file to allow all options to be over-riden. Move default module types to options.py to simplify config file. 2018-01-19 16:38:19 -08:00
example_config_scn3me_subm.py Simplify configuration file to allow all options to be over-riden. Move default module types to options.py to simplify config file. 2018-01-19 16:38:19 -08:00
geometry.py Remove metal3 blanket blockage on library cells. 2017-12-19 09:55:59 -08:00
globals.py Fixed command line arguments to take priority over config file. Any option can be specified in config file now. 2018-01-21 11:21:09 -08:00
hierarchical_decoder.py Simplify configuration file to allow all options to be over-riden. Move default module types to options.py to simplify config file. 2018-01-19 16:38:19 -08:00
hierarchical_predecode.py Simplify configuration file to allow all options to be over-riden. Move default module types to options.py to simplify config file. 2018-01-19 16:38:19 -08:00
hierarchical_predecode2x4.py Change default delay modeling to analytical. Add command-line option characterization by simulation (-c). 2017-11-09 11:13:44 -08:00
hierarchical_predecode3x8.py Change default delay modeling to analytical. Add command-line option characterization by simulation (-c). 2017-11-09 11:13:44 -08:00
hierarchy_layout.py Added workaround to import layouts into Magic. Select and well layers in active contacts. Fixed missing implant enclose active DRC rule in parameterized cells. 2018-01-11 10:24:44 -08:00
hierarchy_spice.py Revised LEF and Verilog generation. Does not read GDS for speed improvements. 2017-12-19 09:01:24 -08:00
lef.py Remove metal3 blanket blockage on library cells. 2017-12-19 09:55:59 -08:00
ms_flop.py Change default delay modeling to analytical. Add command-line option characterization by simulation (-c). 2017-11-09 11:13:44 -08:00
ms_flop_array.py Simplify configuration file to allow all options to be over-riden. Move default module types to options.py to simplify config file. 2018-01-19 16:38:19 -08:00
openram.py Add Makefile for parallel test execution. 2018-01-22 13:39:07 -08:00
options.py Remove personalized temp dir. 2018-01-19 16:39:14 -08:00
path.py
pgate.py Added workaround to import layouts into Magic. Select and well layers in active contacts. Fixed missing implant enclose active DRC rule in parameterized cells. 2018-01-11 10:24:44 -08:00
pin_layout.py Revised LEF and Verilog generation. Does not read GDS for speed improvements. 2017-12-19 09:01:24 -08:00
pinv.py Simplify configuration file to allow all options to be over-riden. Move default module types to options.py to simplify config file. 2018-01-19 16:38:19 -08:00
pnand2.py Simplify configuration file to allow all options to be over-riden. Move default module types to options.py to simplify config file. 2018-01-19 16:38:19 -08:00
pnand3.py Simplify configuration file to allow all options to be over-riden. Move default module types to options.py to simplify config file. 2018-01-19 16:38:19 -08:00
pnor2.py Simplify configuration file to allow all options to be over-riden. Move default module types to options.py to simplify config file. 2018-01-19 16:38:19 -08:00
precharge.py Simplify configuration file to allow all options to be over-riden. Move default module types to options.py to simplify config file. 2018-01-19 16:38:19 -08:00
precharge_array.py Added workaround to import layouts into Magic. Select and well layers in active contacts. Fixed missing implant enclose active DRC rule in parameterized cells. 2018-01-11 10:24:44 -08:00
ptx.py Added workaround to import layouts into Magic. Select and well layers in active contacts. Fixed missing implant enclose active DRC rule in parameterized cells. 2018-01-11 10:24:44 -08:00
regress.sh
replica_bitcell.py
replica_bitline.py Simplify configuration file to allow all options to be over-riden. Move default module types to options.py to simplify config file. 2018-01-19 16:38:19 -08:00
route.py
sense_amp.py Add spice pruning for speed-up. Fix spice search bugs. Add time in stages to openram output. 2017-11-14 13:24:14 -08:00
sense_amp_array.py Simplify configuration file to allow all options to be over-riden. Move default module types to options.py to simplify config file. 2018-01-19 16:38:19 -08:00
single_level_column_mux.py Simplify configuration file to allow all options to be over-riden. Move default module types to options.py to simplify config file. 2018-01-19 16:38:19 -08:00
single_level_column_mux_array.py Revised LEF and Verilog generation. Does not read GDS for speed improvements. 2017-12-19 09:01:24 -08:00
sram.py Simplify configuration file to allow all options to be over-riden. Move default module types to options.py to simplify config file. 2018-01-19 16:38:19 -08:00
tri_gate.py Add spice pruning for speed-up. Fix spice search bugs. Add time in stages to openram output. 2017-11-14 13:24:14 -08:00
tri_gate_array.py Simplify configuration file to allow all options to be over-riden. Move default module types to options.py to simplify config file. 2018-01-19 16:38:19 -08:00
utils.py Rewrite CONTRIBUTING.md to add changes relative to dev. Add small changes from orbe7947. 2017-12-12 15:50:45 -08:00
vector.py
verilog.py Revised LEF and Verilog generation. Does not read GDS for speed improvements. 2017-12-19 09:01:24 -08:00
wire.py
wordline_driver.py Rewrite the parameterized transistor and gate classes. 2017-12-12 15:04:01 -08:00
write_driver.py Add spice pruning for speed-up. Fix spice search bugs. Add time in stages to openram output. 2017-11-14 13:24:14 -08:00
write_driver_array.py Simplify configuration file to allow all options to be over-riden. Move default module types to options.py to simplify config file. 2018-01-19 16:38:19 -08:00