OpenRAM/compiler
mrg f45efe3db6 Abstracted LEF added. Params for array wordline layers. 2021-04-21 11:04:01 -07:00
..
base Abstracted LEF added. Params for array wordline layers. 2021-04-21 11:04:01 -07:00
bitcells Update copyright year. 2021-01-22 11:23:28 -08:00
characterizer Use built in binary conversion. Improve spare debug output. 2021-04-07 16:08:29 -07:00
custom Update copyright year. 2021-01-22 11:23:28 -08:00
datasheet Merge branch 'dev' into automated_analytical_model 2021-02-01 01:49:45 -08:00
drc Update copyright year. 2021-01-22 11:23:28 -08:00
example_configs Skywater changes. 2021-03-22 15:48:14 -07:00
gdsMill Make default no magnification to text. PEP8 Cleanup 2020-12-09 11:42:28 -08:00
modules Abstracted LEF added. Params for array wordline layers. 2021-04-21 11:04:01 -07:00
pgates Add wells to driver stages. Remove unnecessary height/center in control logic. 2021-03-25 10:00:24 -07:00
router Use magic for LEF abstract. Fix supply perimter pin. 2021-04-14 10:01:43 -07:00
sram Abstracted LEF added. Params for array wordline layers. 2021-04-21 11:04:01 -07:00
tests Update unit test results with new Verilog models. 2021-04-15 15:48:20 -07:00
verify Remove option that causes errors and is unused. 2021-03-01 16:36:27 -08:00
Makefile Clean up Makefile for unit tests 2018-12-05 12:58:10 -08:00
debug.py Skywater changes. 2021-03-22 15:48:14 -07:00
gen_stimulus.py Update copyright year. 2021-01-22 11:23:28 -08:00
globals.py v1.1.15 2021-04-19 11:54:35 -07:00
openram.py Update copyright year. 2021-01-22 11:23:28 -08:00
options.py Abstracted LEF added. Params for array wordline layers. 2021-04-21 11:04:01 -07:00
printGDS.py Add printGDS script to aid debugging things. 2020-12-02 11:52:38 -08:00
processGDS.py Make default no magnification to text. PEP8 Cleanup 2020-12-09 11:42:28 -08:00
run_profile.sh Convert pin map to a set for faster membership. 2019-04-01 15:45:44 -07:00
sram_factory.py Update copyright year. 2021-01-22 11:23:28 -08:00
view_profile.py Update copyright year. 2021-01-22 11:23:28 -08:00