| .. |
|
base
|
Refactor banked SRAM into multiple files and dynamically load in SRAM
|
2018-07-10 14:17:09 -07:00 |
|
characterizer
|
Close files in trim spice and delay.
|
2018-06-29 15:11:41 -07:00 |
|
gdsMill
|
Convert entire OpenRAM to use python3. Works with Python 3.6.
|
2018-05-14 16:15:45 -07:00 |
|
modules
|
Push create bus functions down into layout class.
|
2018-07-10 10:06:59 -07:00 |
|
pgates
|
Remove uniqe pbitcell id since it isn't needed. Convert dos EOL to unix EOL characters. Convert python2.7 to python3 in pbitcell.
|
2018-06-29 11:49:02 -07:00 |
|
router
|
Fix unit tests to be DRC clean.
|
2017-06-07 10:29:53 -07:00 |
|
tests
|
Do not fail assertion in exception code.
|
2018-07-10 14:16:18 -07:00 |
|
verify
|
python 3 changes d.iterkeys() -> iter(d.keys())
|
2018-05-29 11:54:10 -07:00 |
|
Makefile
|
Add Makefile for parallel test execution.
|
2018-01-22 13:39:07 -08:00 |
|
debug.py
|
Clean up messages.
|
2018-02-02 12:31:33 -08:00 |
|
example_config_freepdk45.py
|
Fix num words in example.
|
2018-02-23 12:17:43 -08:00 |
|
example_config_scn3me_subm.py
|
Example config only characterizes a single corner. Remove default name of sram to generate more meaningful name. Begin pre-computed IP library.
|
2018-02-12 11:22:47 -08:00 |
|
gen_stimulus.py
|
Convert entire OpenRAM to use python3. Works with Python 3.6.
|
2018-05-14 16:15:45 -07:00 |
|
globals.py
|
Allow python 3.5. Make easier to revise required version.
|
2018-06-29 09:23:43 -07:00 |
|
openram.py
|
Convert entire OpenRAM to use python3. Works with Python 3.6.
|
2018-05-14 16:15:45 -07:00 |
|
options.py
|
Fix options so it is in /tmp in RAM drive
|
2018-07-05 16:33:26 -07:00 |
|
sram.py
|
Refactor banked SRAM into multiple files and dynamically load in SRAM
|
2018-07-10 14:17:09 -07:00 |
|
sram_1bank.py
|
Refactor banked SRAM into multiple files and dynamically load in SRAM
|
2018-07-10 14:17:09 -07:00 |
|
sram_2bank.py
|
Refactor banked SRAM into multiple files and dynamically load in SRAM
|
2018-07-10 14:17:09 -07:00 |
|
sram_4bank.py
|
Refactor banked SRAM into multiple files and dynamically load in SRAM
|
2018-07-10 14:17:09 -07:00 |
d95a1925d4