OpenRAM/compiler/sram
mrg ee18f61cbf Route RBL to edge of bank. 2020-03-06 09:03:52 -08:00
..
sram.py PEP8 Formatting 2020-03-05 16:20:21 -08:00
sram_1bank.py Route RBL to edge of bank. 2020-03-06 09:03:52 -08:00
sram_2bank.py Clean up and generalize layer rules. 2019-12-17 11:03:36 -08:00
sram_base.py Route RBL to edge of bank. 2020-03-06 09:03:52 -08:00
sram_config.py s8 gdsless netlist only working up to dff array 2020-02-09 21:37:09 -08:00