Matt Guthaus 289d3b3988 Feedthru port edits. ...

Comment about write driver size for write through to work, but
disable write through in functional simulation.
Provide warning in Verilog about write throughs.

2019-09-27 14:18:49 -07:00

..

__init__.py

Removed unused characterization module.

2019-07-30 20:33:17 -07:00

bit_polarity.py

Clean up. Split class into own file.

2019-07-24 08:15:10 -07:00

charutils.py

Clean up. Split class into own file.

2019-07-24 08:15:10 -07:00

delay.py

Clean and simplify simulation code. Feedthru check added.

2019-09-06 12:09:12 -07:00

functional.py

Feedthru port edits.

2019-09-27 14:18:49 -07:00

lib.py

Added wmask as a type group to .lib.

2019-09-04 09:45:11 -07:00

logical_effort.py

Made all cin function relate to farads and all input_load relate to relative units.

2019-08-08 01:57:04 -07:00

measurements.py

Merged and fixed conflicts with dev

2019-06-25 16:55:50 -07:00

model_check.py

Merged and fixed conflicts with dev

2019-06-25 16:55:50 -07:00

setup_hold.py

Removing unused tech parms. Simplifying redundant parms.

2019-09-04 16:08:18 -07:00

simulation.py

Clean and simplify simulation code. Feedthru check added.

2019-09-06 12:09:12 -07:00

sram_op.py

Clean up. Split class into own file.

2019-07-24 08:15:10 -07:00

stimuli.py

Remove unused test structures

2019-09-06 14:58:47 -07:00

trim_spice.py

Fix space before comment

2019-06-14 08:43:41 -07:00