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OpenRAM/technology/scn4m_subm/sp_lib
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Hunter Nichols 6efe0f56c2 Added gds/sp for scn4m 1rw+1r bitcell. Passes DRC/LVS in both technologies for single and array. 2018-10-26 00:08:13 -07:00
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cell_1rw_1r.sp Added gds/sp for scn4m 1rw+1r bitcell. Passes DRC/LVS in both technologies for single and array. 2018-10-26 00:08:13 -07:00
cell_6t.sp Added scn4m_subm. 2018-09-13 12:53:35 -07:00
dff.sp Added scn4m_subm. 2018-09-13 12:53:35 -07:00
replica_cell_6t.sp Added scn4m_subm. 2018-09-13 12:53:35 -07:00
sense_amp.sp Added scn4m_subm. 2018-09-13 12:53:35 -07:00
tri_gate.sp Added scn4m_subm. 2018-09-13 12:53:35 -07:00
write_driver.sp Added scn4m_subm. 2018-09-13 12:53:35 -07:00