luke
/
OpenRAM
mirror of https://github.com/VLSIDA/OpenRAM.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
OpenRAM/technology/scn4m_subm
History
Hunter Nichols 6efe0f56c2 Added gds/sp for scn4m 1rw+1r bitcell. Passes DRC/LVS in both technologies for single and array. 2018-10-26 00:08:13 -07:00
..
gds_lib Added gds/sp for scn4m 1rw+1r bitcell. Passes DRC/LVS in both technologies for single and array. 2018-10-26 00:08:13 -07:00
mag_lib Added gds/sp for scn4m 1rw+1r bitcell. Passes DRC/LVS in both technologies for single and array. 2018-10-26 00:08:13 -07:00
models Added scn4m_subm. 2018-09-13 12:53:35 -07:00
sp_lib Added gds/sp for scn4m 1rw+1r bitcell. Passes DRC/LVS in both technologies for single and array. 2018-10-26 00:08:13 -07:00
sue_lib Added scn4m_subm. 2018-09-13 12:53:35 -07:00
tech Fixed spacing in golden lib files. Added column mux into analytical model. 2018-10-24 00:16:26 -07:00
tf Supply router working except: 2018-09-18 12:57:39 -07:00