Jesse Cirimelli-Low c69e5fdb18 added compile time to datasheet

2019-01-02 10:30:03 -08:00

..

__init__.py

Added initial structure for bitline measurements.

2018-12-11 14:06:11 -08:00

bitline_delay.py

Added better port selection to bitline measurements.

2018-12-12 15:59:20 -08:00

charutils.py

In delay.py, altered dummy address based on column mux. Added some hacks to make min_period work for srams with columns muxes.

2018-11-23 13:19:55 -08:00

delay.py

Fixed delay test values.

2018-12-05 00:13:23 -08:00

functional.py

Moved feasible period search from functional.py to tests.

2018-12-05 23:23:40 -08:00

lib.py

added compile time to datasheet

2019-01-02 10:30:03 -08:00

logical_effort.py

Changed s_en delay calculation based recent control logic changes.

2018-12-05 17:10:11 -08:00

setup_hold.py

Updating ms_flop removal.

2018-09-13 11:40:24 -07:00

simulation.py

Functional simulation uses threshold for high and low noise margins

2018-11-28 16:55:04 -08:00

stimuli.py

Added bitline measures with hardcoded names.

2018-12-12 00:43:08 -08:00

trim_spice.py

Added bitline measures with hardcoded names.

2018-12-12 00:43:08 -08:00

worst_case.py

Made delay.py a child of simulation.py. Removed duplicate code in delay and changed some in simulation

2018-10-09 17:44:28 -07:00