mirror of https://github.com/VLSIDA/OpenRAM.git
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| .. | ||
| __init__.py | ||
| calibreDRC_scn3me_subm.rul | ||
| calibreLVS_scn3me_subm.rul | ||
| ptx_port.py | ||
| tech.py | ||
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| .. | ||
| __init__.py | ||
| calibreDRC_scn3me_subm.rul | ||
| calibreLVS_scn3me_subm.rul | ||
| ptx_port.py | ||
| tech.py | ||