OpenRAM/compiler/pgates
mrg 9beb0f4ece Add separate well design rules.
Needed to fix various pgates with wells.
Did some cleanup of these gates as well.
2020-01-23 19:43:41 +00:00
..
pand2.py Clean up and generalize layer rules. 2019-12-17 11:03:36 -08:00
pand3.py Clean up and generalize layer rules. 2019-12-17 11:03:36 -08:00
pbuf.py Clean up and generalize layer rules. 2019-12-17 11:03:36 -08:00
pdriver.py Clean up and generalize layer rules. 2019-12-17 11:03:36 -08:00
pgate.py Add separate well design rules. 2020-01-23 19:43:41 +00:00
pinv.py Add separate well design rules. 2020-01-23 19:43:41 +00:00
pinvbuf.py Clean up and generalize layer rules. 2019-12-17 11:03:36 -08:00
pnand2.py Add separate well design rules. 2020-01-23 19:43:41 +00:00
pnand3.py Add separate well design rules. 2020-01-23 19:43:41 +00:00
pnor2.py Add separate well design rules. 2020-01-23 19:43:41 +00:00
precharge.py Add separate well design rules. 2020-01-23 19:43:41 +00:00
ptristate_inv.py Add separate well design rules. 2020-01-23 19:43:41 +00:00
ptx.py Add separate well design rules. 2020-01-23 19:43:41 +00:00
pwrite_driver.py Add separate well design rules. 2020-01-23 19:43:41 +00:00
single_level_column_mux.py Clean up and generalize layer rules. 2019-12-17 11:03:36 -08:00