Logo
Explore Help
Sign In
luke/OpenRAM
Watch 1
Star 0
Fork 0
mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 17:39:02 +02:00
Code Issues Packages Projects Releases Wiki Activity
Files
94e5050513948a5baf2c69558640817a9ac975fb
OpenRAM/compiler/characterizer
T
History
Hunter Nichols a711a5823d Merged dev and fix conflicts in geometry.py
2018-10-24 10:52:22 -07:00
..
__init__.py
Added class and test for testing the delay of several bitcells.
2018-10-08 15:50:52 -07:00
charutils.py
Fix module import names for python3. Rename parse function to something meaningful.
2018-06-29 09:45:07 -07:00
delay.py
Fixed spacing in golden lib files. Added column mux into analytical model.
2018-10-24 00:16:26 -07:00
functional.py
Added run-level option for write_control and enabled fast mode in functional tests
2018-10-24 09:32:44 -07:00
lib.py
Fixed multiport lib files not generating the correct number of signals. Move setup time from DOUT to DIN in lib file. Altered golden files with these changes.
2018-10-24 00:17:08 -07:00
setup_hold.py
Updating ms_flop removal.
2018-09-13 11:40:24 -07:00
simulation.py
Fixed merge conflicts with sram.py
2018-10-22 17:29:14 -07:00
stimuli.py
Add ngspice equivalents of RUNLVL
2018-10-24 10:31:27 -07:00
trim_spice.py
Fixed merge conflicts with sram.py
2018-10-22 17:29:14 -07:00
worst_case.py
Made delay.py a child of simulation.py. Removed duplicate code in delay and changed some in simulation
2018-10-09 17:44:28 -07:00
Powered by Gitea Version: 1.27.2 Page: 1283ms Template: 5ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API