Logo
Explore Help
Sign In
luke/OpenRAM
Watch 1
Star 0
Fork 0
mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 17:39:02 +02:00
Code Issues Packages Projects Releases Wiki Activity
Files
8eb4812e166571db8892ac64652fc5bc7a3fa985
OpenRAM/technology/scn3me_subm/sp_lib
T
History
Matt Guthaus 58e41a998f Replace write driver with human readable sp file.
2018-11-27 11:49:08 -08:00
..
cell_6t.sp
Change internal nets of 6T cell and write driver to have useful names for debugging.
2018-07-26 11:26:47 -07:00
dff.sp
Remove ms_flop and replace with dff. Might break setup_hold tests.
2018-09-13 11:02:28 -07:00
ms_flop.sp
Get rid of netgen error of undefined dlatch. Fix sp_read to find correct subckt name and pins.
2018-02-27 08:59:46 -08:00
replica_cell_6t.sp
RELEASE 1.0
2016-11-08 09:57:35 -08:00
sense_amp.sp
Fix pin nameon sense amp spice. Fix NAND2 bug in hierarchical decoder.
2018-02-02 14:08:56 -08:00
tri_gate.sp
RELEASE 1.0
2016-11-08 09:57:35 -08:00
write_driver.sp
Replace write driver with human readable sp file.
2018-11-27 11:49:08 -08:00
Powered by Gitea Version: 1.27.2 Page: 966ms Template: 4ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API