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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 17:39:02 +02:00
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8664f7a0b8a54f1bb4b5eb8b2f7cb31c163f4659
OpenRAM/compiler/base
T
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Matt Guthaus 8664f7a0b8 Converted all modules to not run create_layout when netlist_only
mode is enabled.
2018-08-27 16:42:48 -07:00
..
contact.py
Fix analytical power of contact with new hierarchy_design level introduced.
2018-07-10 10:17:23 -07:00
design.py
Refactor banked SRAM into multiple files and dynamically load in SRAM
2018-07-10 14:17:09 -07:00
geometry.py
Converted all modules to not run create_layout when netlist_only
2018-08-27 16:42:48 -07:00
hierarchy_design.py
Modify unit tests to reset options during init_openram so
2018-07-10 16:39:32 -07:00
hierarchy_layout.py
Converted all modules to not run create_layout when netlist_only
2018-08-27 16:42:48 -07:00
hierarchy_spice.py
Add place_inst routine.
2018-08-27 10:42:40 -07:00
lef.py
Remove carriage returns form python files
2018-08-07 09:44:01 -07:00
path.py
Merge branch 'dev' of github.com:mguthaus/OpenRAM into dev
2018-02-09 10:25:28 -08:00
pin_layout.py
Convert entire OpenRAM to use python3. Works with Python 3.6.
2018-05-14 16:15:45 -07:00
route.py
Move last few modules to base dir
2018-02-09 10:29:37 -08:00
utils.py
Move utils to base.
2018-02-09 10:42:23 -08:00
vector.py
Organize top-level files into subdirs.
2018-02-09 10:25:24 -08:00
verilog.py
Move last few modules to base dir
2018-02-09 10:29:37 -08:00
wire.py
Merge branch 'dev' of github.com:mguthaus/OpenRAM into dev
2018-02-09 10:25:28 -08:00
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