David Ratchkov 7e36cd4828 - Write voltage_map and pg_pin ... - Remove 'when' condition on leakage power - Remove 'clk*' from 'when' condition on internal_power on the same 'clk*' pin		2020-04-17 13:45:57 -07:00
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__init__.py	Removed unused characterization module.	2019-07-30 20:33:17 -07:00
bit_polarity.py	Clean up. Split class into own file.	2019-07-24 08:15:10 -07:00
charutils.py	Clean up. Split class into own file.	2019-07-24 08:15:10 -07:00
delay.py	Fixed issues with bitcell measurements variable names, made target write ports required during characterization	2020-02-19 15:34:31 -08:00
functional.py	Feedthru port edits.	2019-09-27 14:18:49 -07:00
lib.py	- Write voltage_map and pg_pin	2020-04-17 13:45:57 -07:00
logical_effort.py	Made all cin function relate to farads and all input_load relate to relative units.	2019-08-08 01:57:04 -07:00
measurements.py	…
model_check.py	…
setup_hold.py	Remove extra print	2019-11-17 10:40:01 -08:00
simulation.py	Clean and simplify simulation code. Feedthru check added.	2019-09-06 12:09:12 -07:00
sram_op.py	Clean up. Split class into own file.	2019-07-24 08:15:10 -07:00
stimuli.py	Remove unused test structures	2019-09-06 14:58:47 -07:00
trim_spice.py	…