OpenRAM/compiler
Michael Timothy Grimes 7b315a3b69 updating inverter to write transistor spacings 2018-07-12 20:52:05 -07:00
..
base Fix duplicate name check for some modules by checking if name is a substring. Allows pbitcell to pass. 2018-06-29 09:23:23 -07:00
characterizer Close files in trim spice and delay. 2018-06-29 15:11:41 -07:00
gdsMill Convert entire OpenRAM to use python3. Works with Python 3.6. 2018-05-14 16:15:45 -07:00
modules Fix sense amp spacing after modifying index to be increment by one. 2018-06-29 15:30:17 -07:00
pgates updating inverter to write transistor spacings 2018-07-12 20:52:05 -07:00
router Fix unit tests to be DRC clean. 2017-06-07 10:29:53 -07:00
tests Change test sram path so jobs can be simultaneously run. 2018-07-06 07:34:38 -07:00
verify python 3 changes d.iterkeys() -> iter(d.keys()) 2018-05-29 11:54:10 -07:00
Makefile Add Makefile for parallel test execution. 2018-01-22 13:39:07 -08:00
debug.py Clean up messages. 2018-02-02 12:31:33 -08:00
example_config_freepdk45.py Fix num words in example. 2018-02-23 12:17:43 -08:00
example_config_scn3me_subm.py Example config only characterizes a single corner. Remove default name of sram to generate more meaningful name. Begin pre-computed IP library. 2018-02-12 11:22:47 -08:00
gen_stimulus.py Convert entire OpenRAM to use python3. Works with Python 3.6. 2018-05-14 16:15:45 -07:00
globals.py Allow python 3.5. Make easier to revise required version. 2018-06-29 09:23:43 -07:00
openram.py Convert entire OpenRAM to use python3. Works with Python 3.6. 2018-05-14 16:15:45 -07:00
options.py Fix options so it is in /tmp in RAM drive 2018-07-05 16:33:26 -07:00
regress.sh Add regress.sh script for convenience 2016-11-18 08:00:34 -08:00
sram.py Convert entire OpenRAM to use python3. Works with Python 3.6. 2018-05-14 16:15:45 -07:00