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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 17:39:02 +02:00
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6c537c48847f01201a00e27beaf736cc4404d568
OpenRAM/compiler/characterizer
T
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Hunter Nichols 6c537c4884 Made stim node names more ngspice friendly for interactive mode. Cleaned up cycle comments. Changed ground names in stim and added related comments.
2018-10-04 14:06:43 -07:00
..
__init__.py
Adding simulation.py for common functions between functional and delay tests. Updating functional test.
2018-10-04 09:29:44 -07:00
charutils.py
Fix module import names for python3. Rename parse function to something meaningful.
2018-06-29 09:45:07 -07:00
delay.py
Made stim node names more ngspice friendly for interactive mode. Cleaned up cycle comments. Changed ground names in stim and added related comments.
2018-10-04 14:06:43 -07:00
functional.py
Correcting functional inheritance from simulation.
2018-10-04 13:55:59 -07:00
lib.py
Edited lib to support port indexing. Edited tests in reaction to name dict name changes. Cleaned up measurement value generation in delay.
2018-10-04 14:04:08 -07:00
setup_hold.py
Updating ms_flop removal.
2018-09-13 11:40:24 -07:00
simulation.py
Adding simulation.py for common functions between functional and delay tests. Updating functional test.
2018-10-04 09:29:44 -07:00
stimuli.py
Made stim node names more ngspice friendly for interactive mode. Cleaned up cycle comments. Changed ground names in stim and added related comments.
2018-10-04 14:06:43 -07:00
trim_spice.py
Convert bitline index to integer in trim_spice
2018-07-26 14:29:44 -07:00
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