OpenRAM/compiler/pgates
Matt Guthaus a6c2e77bcf Move precharge and column mux cells to pgate directory.
Move gnd to M3 in column mux.
Create column mux cell unit test.
2018-04-06 17:15:14 -07:00
..
pgate.py Add dffs to control logic. Rename layout pin segment/rect functions for consistency. Redo gnd/vdd pins in control. 2018-03-23 08:14:09 -07:00
pinv.py Add dffs to control logic. Rename layout pin segment/rect functions for consistency. Redo gnd/vdd pins in control. 2018-03-23 08:14:09 -07:00
pinvbuf.py Add dffs to control logic. Rename layout pin segment/rect functions for consistency. Redo gnd/vdd pins in control. 2018-03-23 08:14:09 -07:00
pnand2.py Add dffs to control logic. Rename layout pin segment/rect functions for consistency. Redo gnd/vdd pins in control. 2018-03-23 08:14:09 -07:00
pnand3.py Add dffs to control logic. Rename layout pin segment/rect functions for consistency. Redo gnd/vdd pins in control. 2018-03-23 08:14:09 -07:00
pnor2.py Add dffs to control logic. Rename layout pin segment/rect functions for consistency. Redo gnd/vdd pins in control. 2018-03-23 08:14:09 -07:00
precharge.py Move precharge and column mux cells to pgate directory. 2018-04-06 17:15:14 -07:00
ptx.py Add dffs to control logic. Rename layout pin segment/rect functions for consistency. Redo gnd/vdd pins in control. 2018-03-23 08:14:09 -07:00
single_level_column_mux.py Move precharge and column mux cells to pgate directory. 2018-04-06 17:15:14 -07:00