Joey Kunzler 0bae652be9 fix merge conflicts		2020-04-23 11:51:46 -07:00
..
contact.py	…
custom_cell_properties.py	sense_amp: Allow custom pin names	2020-02-17 15:20:12 +01:00
delay_data.py	…
design.py	Fix wire width bug in short jogs. PEP8 cleanup.	2020-04-15 09:48:42 -07:00
errors.py	Add exception errors file	2020-04-08 16:55:45 -07:00
geometry.py	Add purpose to string output	2020-04-21 15:20:30 -07:00
graph_util.py	…
hierarchy_design.py	Add optional lvs_lib netlists for LVS usage (sp_lib is for simulation)	2020-04-03 13:39:54 -07:00
hierarchy_layout.py	fix merge conflicts	2020-04-23 11:51:46 -07:00
hierarchy_spice.py	Output lvs model instead of spice model	2020-04-06 14:08:38 -07:00
lef.py	…
pin_layout.py	added purposes to addText(), removed reference to specific tech from gdsMill	2020-02-19 16:26:52 -08:00
power_data.py	…
route.py	…
utils.py	s8 gdsless netlist only working up to dff array	2020-02-09 21:37:09 -08:00
vector.py	…
verilog.py	…
wire.py	Don't widen too short wires either	2020-04-16 11:02:54 -07:00
wire_path.py	…
wire_spice_model.py	…