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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-09-02 02:57:53 +02:00
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4ab694033d956de2702f547fa30c5f2a7253f274
OpenRAM/technology/freepdk45/gds_lib
T
History
Bob Vanhoof d14a68847e added cell label checker and cell labels to the freepdk technology
2021-02-09 13:09:26 +01:00
..
cell_1rw.gds
added cell label checker and cell labels to the freepdk technology
2021-02-09 13:09:26 +01:00
cell_2rw.gds
Convert bitcells to 1port and 2port
2020-11-13 08:09:21 -08:00
dff.gds
Flip freepdk45 flop, dff_buf route layer change
2020-06-09 13:48:16 -07:00
dummy_cell_1rw.gds
Rework bitcells.
2020-11-13 10:07:40 -08:00
dummy_cell_2rw.gds
Convert bitcells to 1port and 2port
2020-11-13 08:09:21 -08:00
replica_cell_1rw.gds
Rework bitcells.
2020-11-13 10:07:40 -08:00
replica_cell_2rw.gds
Convert bitcells to 1port and 2port
2020-11-13 08:09:21 -08:00
sense_amp.gds
Move output of sense amp to side like other techs
2020-06-26 15:29:27 -07:00
tri_gate.gds
Move sense amp to tri gate routing to M3... not ideal.
2018-04-23 09:14:18 -07:00
write_driver.gds
Move write_driver din left to avoid control signal in spare columns.
2020-07-16 14:47:14 -07:00
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