OpenRAM/technology/freepdk45/tech
mrg 43bbd2e722 Fixed incorrect via2 spacing rule in tech file. 2021-11-22 11:33:27 -08:00
..
__init__.py update copyright year. 2021-01-22 11:24:53 -08:00
freepdk45.lydrc Change via2 to 65nm to be compatible with Calibre FreePDK45 deck 2021-09-16 15:42:02 -07:00
freepdk45.lylvs Fix cheat on wordline driver name. 2021-11-22 11:33:27 -08:00
freepdk45.lyp Initial klayout DRC/LVS options 2021-09-07 16:51:16 -07:00
freepdk45.lyt Initial klayout DRC/LVS options 2021-09-07 16:51:16 -07:00
scn4m_subm.lyp Add DRC rules and display files 2021-11-22 11:33:27 -08:00
scn4m_subm.lyt Add DRC rules and display files 2021-11-22 11:33:27 -08:00
tech.py Fixed incorrect via2 spacing rule in tech file. 2021-11-22 11:33:27 -08:00