rlin50 ec28bc6dfd Fix sky130 1rw LVS mismatch by correcting col_cap pin order

2026-02-22 22:11:35 -08:00

..

__init__.py

Use packages for imports.

2022-07-13 15:55:57 -07:00

replica_bitcell_array.py

fixes to the custom module fix

2023-03-04 19:17:29 -08:00

sky130_bitcell_array.py

Update copyright year

2023-01-28 22:56:27 -08:00

sky130_bitcell_base_array.py

Fix sky130 1rw LVS mismatch by correcting col_cap pin order

2026-02-22 22:11:35 -08:00

sky130_bitcell.py

Update copyright year

2023-01-28 22:56:27 -08:00

sky130_capped_replica_bitcell_array.py

conform default behavior for sky130 custom modules to unit test

2023-06-07 17:31:12 -07:00

sky130_col_cap_array.py

Fix sky130 1rw LVS mismatch by correcting col_cap pin order

2026-02-22 22:11:35 -08:00

sky130_col_cap.py

Update copyright year

2023-01-28 22:56:27 -08:00

sky130_corner.py

Update copyright year

2023-01-28 22:56:27 -08:00

sky130_dummy_array.py

Update copyright year

2023-01-28 22:56:27 -08:00

sky130_dummy_bitcell.py

Update copyright year

2023-01-28 22:56:27 -08:00

sky130_internal.py

Update copyright year

2023-01-28 22:56:27 -08:00

sky130_replica_bitcell_array.py

fix single port by using existing custom modules

2023-03-03 14:17:57 -08:00

sky130_replica_bitcell.py

Update copyright year

2023-01-28 22:56:27 -08:00

sky130_replica_column.py

Update copyright year

2023-01-28 22:56:27 -08:00

sky130_row_cap_array.py

Update copyright year

2023-01-28 22:56:27 -08:00

sky130_row_cap.py

Update copyright year

2023-01-28 22:56:27 -08:00