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luke
/
OpenRAM
mirror of
https://github.com/VLSIDA/OpenRAM.git
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13b1d4613c
OpenRAM
/
compiler
/
bitcells
History
jcirimel
3221b4ec57
update to new metal stack names
2020-07-31 05:27:19 -07:00
..
bitcell.py
…
bitcell_1rw_1r.py
…
bitcell_1w_1r.py
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bitcell_base.py
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col_cap_bitcell_1rw_1r.py
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dummy_bitcell.py
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dummy_bitcell_1rw_1r.py
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dummy_bitcell_1w_1r.py
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dummy_pbitcell.py
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pbitcell.py
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replica_bitcell.py
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replica_bitcell_1rw_1r.py
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replica_bitcell_1w_1r.py
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replica_pbitcell.py
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row_cap_bitcell_1rw_1r.py
…