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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-09-04 08:44:12 +02:00
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04ed3792c7e86c8bfb78a90bc07165f1603eba60
OpenRAM/technology/scn3me_subm/sp_lib
T
History
Matt Guthaus 2b839d34a3 Get rid of netgen error of undefined dlatch. Fix sp_read to find correct subckt name and pins.
2018-02-27 08:59:46 -08:00
..
cell_6t.sp
RELEASE 1.0
2016-11-08 09:57:35 -08:00
dff.sp
Add new DFF. Create DFF module. Start dff_array, not tested.
2018-02-14 15:16:28 -08:00
ms_flop.sp
Get rid of netgen error of undefined dlatch. Fix sp_read to find correct subckt name and pins.
2018-02-27 08:59:46 -08:00
replica_cell_6t.sp
RELEASE 1.0
2016-11-08 09:57:35 -08:00
sense_amp.sp
Fix pin nameon sense amp spice. Fix NAND2 bug in hierarchical decoder.
2018-02-02 14:08:56 -08:00
tri_gate.sp
RELEASE 1.0
2016-11-08 09:57:35 -08:00
write_driver.sp
Change wen to en in spice lib files. Check lvs report insted of stdout with netgen.
2018-02-01 05:38:48 -08:00
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