7 Commits

Author	SHA1	Message	Date
Matt	d22d7de195	Reapply jsowash update without spice model file	2019-06-24 08:59:58 -07:00
Matt Guthaus	a234b0af88	Fix space before comment	2019-06-14 08:43:41 -07:00
Matt Guthaus	0f03553689	Update copyright to correct years.	2019-05-06 06:50:15 -07:00
Matt Guthaus	3f9a987e51	Update copyright. Add header to all OpenRAM files.	2019-04-26 12:33:53 -07:00
Matt Guthaus	5de7ff3773	Updated Verilog to have multiport. Added 1rw,1rw/1r Verilog testbench.	2019-01-11 14:15:16 -08:00
Matt Guthaus	34736b7b3f	Remove carriage returns form python files	2018-08-07 09:44:01 -07:00
Matt Guthaus	84c798d9e4	Move last few modules to base dir	2018-02-09 10:29:37 -08:00