Must set PYTHONPATH to include OPENRAM_HOME now.
Reorganizes subdirs as packages.
Rewrites unit tests to use packages.
Update README.md with instructions, dependencies etc.
Update sky130 module imports.
Change tech specific package from modules to custom.
Add hard decoder gates (nand, inv, pnan)
Add conditions for routing using LI layer in s8.
Generalize bus layers for decoders.
Move custom cells to own directory.
Fixed via directions, etc.
Add 4x16 hierarchical decoder and test case
we don't want to propagate the write driver bl/br names out of the
write_driver_array. Thus the write_driver_array gets them named as
"bl"/"br" again.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
all pin names should be wrapped into a function/property. This ensures
that there is exactly one place to change the name.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
before the names of bl/br from the bitcell were assumed. If we want to
allow renaming of bl/br from bitcells, we have to seperate the other
modules from that. Note, that we don't touch every occurence of bl/br,
but only the once necessary that pin renaming of the bitcell works.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
mrg
Bastian Koppelmann
jcirimel
Hunter Nichols
Matt Guthaus