16 Commits

Author	SHA1	Message	Date
mrg	3abebe4068	Add hierarchical seperator option to work with Xyce measurements.	2021-05-14 16:16:25 -07:00
Matt Guthaus	30fc81a1f0	Update copyright year.	2021-01-22 11:23:28 -08:00
mrg	da721a677d	Remove EOL whitespace globally	2020-11-03 06:29:17 -08:00
mrg	15c8c200f3	Undo super() in measurement abstract class	2020-08-12 12:10:12 -07:00
mrg	30976df48f	Change inheritance inits to use super	2020-08-06 11:33:26 -07:00
Hunter Nichols	4e08e2da87	Merged and fixed conflicts with dev	2019-06-25 16:55:50 -07:00
Matt Guthaus	a234b0af88	Fix space before comment	2019-06-14 08:43:41 -07:00
Hunter Nichols	099bc4e258	Added bitcell check to storage nodes.	2019-05-20 18:35:52 -07:00
Hunter Nichols	d8617acff2	Merged with dev	2019-05-15 18:48:00 -07:00
Hunter Nichols	b4cce65889	Added incorrect read checking in characterizer.	2019-05-13 19:38:46 -07:00
Matt Guthaus	0f03553689	Update copyright to correct years.	2019-05-06 06:50:15 -07:00
Matt Guthaus	3f9a987e51	Update copyright. Add header to all OpenRAM files.	2019-04-26 12:33:53 -07:00
Hunter Nichols	01c8405d12	Fix bitline measurement delays and adjusted default delay chain for column mux srams	2019-02-06 00:46:25 -08:00
Hunter Nichols	272267358f	Moved all bitline delay measurements to delay class. Added measurements to check delay model.	2019-01-03 05:51:28 -08:00
Hunter Nichols	66b2fcdc91	Added data parsing to measurement objects and adding power measurements.	2018-12-20 15:54:56 -08:00
Hunter Nichols	b10ef3fb7e	Replaced delay measure statement with object implementation.	2018-12-19 18:33:06 -08:00