4 Commits

Author	SHA1	Message	Date
mrg	17d144b5b5	Clean up multiport test options to be consistent.	2019-07-12 10:39:55 -07:00
mrg	0b13225913	Single banks working with new RBL	2019-07-11 14:47:27 -07:00
mrg	b841fd7ce3	Replica bitcell array with arbitrary RBLs working	2019-07-10 15:56:51 -07:00
mrg	bc4a3ee2b7	New port_data module works in SCMOS	2019-07-03 13:17:12 -07:00