OpenRAM

Author	SHA1	Message	Date
Matt Guthaus	8fcb551953	Only perform DRC not LVS on transistors	2018-01-30 08:03:54 -08:00
Matt Guthaus	56770f558f	Consolidate checking into our own unit test class. Remove all files in temp dir after each test, not just spice and gds.	2018-01-29 16:59:29 -08:00
Matt Guthaus	efa465757c	Remove dead code ptx_port.	2018-01-19 16:19:05 -08:00
Matt Guthaus	7a172873a3	Update unit tests to load verify after config file. Start magic DRC.	2018-01-12 10:24:49 -08:00
Matt Guthaus	37edd7cac6	Change unit tests to use verify instead of calibre. Debugging gds read comments in magic.py.	2017-11-14 16:24:26 -08:00
Matt Guthaus	a9797d12ab	Added pins to the ptx class. Modified pin class to do lazy write of GDS shapes to allow removal of pins.	2017-10-05 17:35:05 -07:00
Matt Guthaus	cf940fb15d	Development version of new pin data structure. Tests pass LVS/DRC except for bank level.	2017-08-23 15:02:15 -07:00
Matt Guthaus	cffcd46f6d	Removed the name from ptx class. Ptx name is uniquely constructed based on the ptx parameters of type, width, and mult. This allows reuse of ptx among multiple modules.	2017-04-26 14:33:03 -07:00
Matt Guthaus	b82aaa4201	Merge use-temp-dir-pid	2016-11-12 08:55:42 -08:00
Matt Guthaus	9ea1a06244	Remove openram_temp at end of openram and unit tests.	2016-11-11 14:05:14 -08:00
Matt Guthaus	1356e5142d	Add print of values if tests fail. Modify some ngspice tests to pass withcorrect results.	2016-11-11 09:41:43 -08:00
Matt Guthaus	f48272bde6	RELEASE 1.0	2016-11-08 09:57:35 -08:00