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Only perform DRC not LVS on transistors

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This commit is contained in:
Matt Guthaus
2018-01-30 08:03:54 -08:00
parent 1d9274621a
commit 8fcb551953
6 changed files with 6 additions and 6 deletions
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compiler/tests/03_ptx_1finger_nmos_test.py
+1 -1
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@@ -24,7 +24,7 @@ class ptx_test(openram_test):
fet = ptx.ptx(width=tech.drc["minwidth_tx"],
mults=1,
tx_type="nmos")
self.local_check(fet)
self.local_drc_check(fet)
OPTS.check_lvsdrc = True
globals.end_openram()
compiler/tests/03_ptx_1finger_pmos_test.py
+1 -1
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@@ -24,7 +24,7 @@ class ptx_test(openram_test):
fet = ptx.ptx(width=tech.drc["minwidth_tx"],
mults=1,
tx_type="pmos")
self.local_check(fet)
self.local_drc_check(fet)
OPTS.check_lvsdrc = True
globals.end_openram()
compiler/tests/03_ptx_3finger_nmos_test.py
+1 -1
View File
@@ -26,7 +26,7 @@ class ptx_test(openram_test):
tx_type="nmos",
connect_active=True,
connect_poly=True)
self.local_check(fet)
self.local_drc_check(fet)
OPTS.check_lvsdrc = True
globals.end_openram()
compiler/tests/03_ptx_3finger_pmos_test.py
+1 -1
View File
@@ -26,7 +26,7 @@ class ptx_test(openram_test):
tx_type="pmos",
connect_active=True,
connect_poly=True)
self.local_check(fet)
self.local_drc_check(fet)
OPTS.check_lvsdrc = True
globals.end_openram()
compiler/tests/03_ptx_4finger_nmos_test.py
+1 -1
View File
@@ -26,7 +26,7 @@ class ptx_test(openram_test):
tx_type="nmos",
connect_active=True,
connect_poly=True)
self.local_check(fet)
self.local_drc_check(fet)
OPTS.check_lvsdrc = True
globals.end_openram()
compiler/tests/03_ptx_4finger_pmos_test.py
+1 -1
View File
@@ -26,7 +26,7 @@ class ptx_test(openram_test):
tx_type="pmos",
connect_active=True,
connect_poly=True)
self.local_check(fet)
self.local_drc_check(fet)
OPTS.check_lvsdrc = True
globals.end_openram()