mirror of https://github.com/VLSIDA/OpenRAM.git
Only perform DRC not LVS on transistors
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parent
1d9274621a
commit
8fcb551953
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@ -24,7 +24,7 @@ class ptx_test(openram_test):
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fet = ptx.ptx(width=tech.drc["minwidth_tx"],
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mults=1,
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tx_type="nmos")
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self.local_check(fet)
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self.local_drc_check(fet)
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OPTS.check_lvsdrc = True
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globals.end_openram()
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@ -24,7 +24,7 @@ class ptx_test(openram_test):
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fet = ptx.ptx(width=tech.drc["minwidth_tx"],
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mults=1,
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tx_type="pmos")
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self.local_check(fet)
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self.local_drc_check(fet)
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OPTS.check_lvsdrc = True
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globals.end_openram()
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@ -26,7 +26,7 @@ class ptx_test(openram_test):
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tx_type="nmos",
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connect_active=True,
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connect_poly=True)
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self.local_check(fet)
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self.local_drc_check(fet)
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OPTS.check_lvsdrc = True
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globals.end_openram()
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@ -26,7 +26,7 @@ class ptx_test(openram_test):
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tx_type="pmos",
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connect_active=True,
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connect_poly=True)
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self.local_check(fet)
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self.local_drc_check(fet)
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OPTS.check_lvsdrc = True
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globals.end_openram()
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@ -26,7 +26,7 @@ class ptx_test(openram_test):
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tx_type="nmos",
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connect_active=True,
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connect_poly=True)
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self.local_check(fet)
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self.local_drc_check(fet)
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OPTS.check_lvsdrc = True
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globals.end_openram()
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@ -26,7 +26,7 @@ class ptx_test(openram_test):
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tx_type="pmos",
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connect_active=True,
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connect_poly=True)
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self.local_check(fet)
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self.local_drc_check(fet)
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OPTS.check_lvsdrc = True
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globals.end_openram()
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