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OpenRAM
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4 Commits

Author SHA1 Message Date
Michael Timothy Grimes 8f131ddb2f commiting changes from most recent pull from dev 2018-05-22 17:30:51 -07:00
Michael Timothy Grimes 766042fe69 changed case of handmade bitcell pins from upper case to lower case. Made changes in other modules that are affected by this case. Only for SCMOS for this commit 2018-05-22 14:16:51 -07:00
Matt Guthaus f34c4eb7dc Convert entire OpenRAM to use python3. Works with Python 3.6. 
Major changes:
Remove mpmath library and use numpy instead.
Convert bytes to new bytearrays.
Fix class name check for duplicate gds instances.
Add explicit integer conversion from floats.
Fix importlib reload from importlib library
Fix new key/index syntax issues.
Fix filter and map conversion to lists.
Fix deprecation warnings.
Fix Circuits vs Netlist in Magic LVS results.
Fix file closing warnings.
 2018-05-14 16:15:45 -07:00
Matt Guthaus a6c2e77bcf Move precharge and column mux cells to pgate directory. 
Move gnd to M3 in column mux.
Create column mux cell unit test.
 2018-04-06 17:15:14 -07:00