OpenRAM

Commit Graph

Author	SHA1	Message	Date
Eren Dogan	0a1de57cae	Update copyright year	2024-01-03 14:32:44 -08:00
Eren Dogan	e5fc25da6f	Update copyright year	2023-01-28 22:56:27 -08:00
Eren Dogan	96e57507bf	Add copyright check to code format test	2022-11-30 14:50:43 -08:00
Eren Dogan	fccdc3c45b	Use library imports globally	2022-11-27 13:01:20 -08:00
mrg	d92c7a634d	Use packages for imports. Must set PYTHONPATH to include OPENRAM_HOME now. Reorganizes subdirs as packages. Rewrites unit tests to use packages. Update README.md with instructions, dependencies etc. Update sky130 module imports. Change tech specific package from modules to custom.	2022-07-13 15:55:57 -07:00
mrg	b841e18abd	Remove breakpoint	2022-03-07 16:59:55 -08:00
mrg	2796800898	Fix bug with incorrect pitch while adding channel route trunks.	2022-03-07 16:12:20 -08:00
Matt Guthaus	30fc81a1f0	Update copyright year.	2021-01-22 11:23:28 -08:00
mrg	da721a677d	Remove EOL whitespace globally	2020-11-03 06:29:17 -08:00
mrg	30976df48f	Change inheritance inits to use super	2020-08-06 11:33:26 -07:00
mrg	2ccf3aea3b	Set channel route height and width (of routes, not pins)	2020-07-20 13:25:47 -07:00
mrg	7385decbff	Add channel route cyclic VCG debugging.	2020-07-20 12:02:30 -07:00
mrg	9d5d632d1a	Pins may be below the channel.	2020-07-16 14:23:48 -07:00
mrg	ba3d32fa0c	Starting to implement minimizing channel router (not done)	2020-07-16 13:21:44 -07:00
mrg	c340870ba0	Channel route dout wires as well in read write ports	2020-07-01 14:44:01 -07:00
mrg	47f541df0e	Fix bugs in channel route.	2020-06-28 16:58:28 -07:00
mrg	bc3de9db05	Pick correct side of pin in channel route.	2020-06-28 14:28:18 -07:00
mrg	d53abba479	Always route the channel route since it is it's own design.	2020-06-25 17:43:44 -07:00
mrg	f11afaa63d	Refactor channel route to be a design.	2020-06-25 17:30:03 -07:00

19 Commits