mirror of https://github.com/VLSIDA/OpenRAM.git
Merged with dev, fixed config file conflict.
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commit
ff169fcb2b
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@ -20,7 +20,7 @@ other OpenRAM features. Please see the README.md file on how to run
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the unit tests. Unit tests should work in all technologies. We will run
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the unit tests. Unit tests should work in all technologies. We will run
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the tests on your contributions before they will be accepted.
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the tests on your contributions before they will be accepted.
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# Internally Development
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# Internal Development
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For internal development, follow all of the following steps EXCEPT
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For internal development, follow all of the following steps EXCEPT
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do not fork your own copy. Instead, create a branch in our private repository
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do not fork your own copy. Instead, create a branch in our private repository
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@ -32,21 +32,21 @@ All unit tests should pass first.
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1. One time, create a GitHub account at http://github.com
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1. One time, create a GitHub account at http://github.com
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2. Create a fork of the OpenRAM project on the github web page:
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2. Create a fork of the OpenRAM project on the github web page:
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https://github.com/mguthaus/OpenRAM
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https://github.com/vlsida/openram
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It is on the upper right and says "Fork": This will make your own
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It is on the upper right and says "Fork": This will make your own
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OpenRAM repository on GitHub in your account.
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OpenRAM repository on GitHub in your account.
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3. Clone your repository (or use an existing cloned copy if you've
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3. Clone your repository (or use an existing cloned copy if you've
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already done this once):
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already done this once):
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```
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```
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git clone https://github.com/<youruser>/OpenRAM.git
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git clone https://github.com/<youruser>/oepnram.git
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cd OpenRAM
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cd openram
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```
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```
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4. Set up a new upstream that points to MY OpenRAM repository that you
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4. Set up a new upstream that points to MY OpenRAM repository that you
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forked (only first time):
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forked (only first time):
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```
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```
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git remote add upstream https://github.com/mguthaus/OpenRAM.git
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git remote add upstream https://github.com/vlsida/openram.git
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```
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```
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You now have two remotes for this project:
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You now have two remotes for this project:
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* origin which points to your GitHub fork of the project. You can read
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* origin which points to your GitHub fork of the project. You can read
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@ -9,16 +9,3 @@ temperatures = [25]
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output_path = "temp"
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output_path = "temp"
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output_name = "sram_{0}_{1}_{2}".format(word_size,num_words,tech_name)
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output_name = "sram_{0}_{1}_{2}".format(word_size,num_words,tech_name)
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#Setting for multiport
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# netlist_only = True
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# num_rw_ports = 1
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# num_r_ports = 1
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# num_w_ports = 0
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#Pbitcell modules for multiport
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#bitcell = "pbitcell"
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#replica_bitcell="replica_pbitcell"
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#Custom 1rw+1r multiport cell. Set the above port numbers to rw = 1, r = 1, w = 0
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# bitcell = "bitcell_1rw_1r"
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# replica_bitcell = "replica_bitcell_1rw_1r"
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@ -3,22 +3,9 @@ num_words = 16
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tech_name = "scn4m_subm"
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tech_name = "scn4m_subm"
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process_corners = ["TT"]
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process_corners = ["TT"]
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supply_voltages = [ 5.0 ]
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supply_voltages = [ 3.3 ]
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temperatures = [ 25 ]
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temperatures = [ 25 ]
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output_path = "temp"
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output_path = "temp"
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output_name = "sram_{0}_{1}_{2}".format(word_size,num_words,tech_name)
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output_name = "sram_{0}_{1}_{2}".format(word_size,num_words,tech_name)
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#Setting for multiport
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# netlist_only = True
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# num_rw_ports = 1
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# num_r_ports = 1
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# num_w_ports = 0
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#Pbitcell modules for multiport
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#bitcell = "pbitcell"
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#replica_bitcell="replica_pbitcell"
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#Custom 1rw+1r multiport cell. Set the above port numbers to rw = 1, r = 1, w = 0
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# bitcell = "bitcell_1rw_1r"
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# replica_bitcell = "replica_bitcell_1rw_1r"
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