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OpenRAM
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Merge branch 'dev' of github.com:VLSIDA/PrivateRAM into dev

This commit is contained in:
Matt Guthaus 2018-11-05 13:15:25 -08:00
parent cf4c138032 37b81c0af1
commit f3d1f7d55b
2 changed files with 1 additions and 15 deletions
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7
compiler/example_config_freepdk45.py
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@ -9,10 +9,3 @@ temperatures = [25]
output_path = "temp"
output_name = "sram_{0}_{1}_{2}".format(word_size,num_words,tech_name)
#Setting for multiport
# netlist_only = True
# bitcell = "pbitcell"
# replica_bitcell="replica_pbitcell"
# num_rw_ports = 1
# num_r_ports = 0
# num_w_ports = 1

9
compiler/example_config_scn4m_subm.py
View File

@ -3,16 +3,9 @@ num_words = 16
tech_name = "scn4m_subm"
process_corners = ["TT"]
supply_voltages = [ 5.0 ]
supply_voltages = [ 3.3 ]
temperatures = [ 25 ]
output_path = "temp"
output_name = "sram_{0}_{1}_{2}".format(word_size,num_words,tech_name)
#Setting for multiport
netlist_only = True
bitcell = "pbitcell"
replica_bitcell="replica_pbitcell"
num_rw_ports = 1
num_r_ports = 1
num_w_ports = 1