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Rename ROM unit tests.

This commit is contained in:
mrg 2023-03-13 14:44:50 -07:00 committed by Jacob Walker
parent 041c738cb2
commit fe65a20431
11 changed files with 11 additions and 4 deletions
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0
compiler/modules/rom_base_bank.py → compiler/modules/rom_bank.py
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0
compiler/tests/05_rom_decoder_test.py → compiler/tests/06_rom_decoder_test.py
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compiler/tests/05_rom_column_mux_array_test.py → compiler/tests/07_rom_column_mux_array_test.py
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compiler/tests/05_rom_decoder_buffer_array_test.py → compiler/tests/08_rom_decoder_buffer_array_test.py
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compiler/tests/05_rom_precharge_array_test.py → compiler/tests/08_rom_precharge_array_test.py
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compiler/tests/05_rom_wordline_driver_array_test.py → compiler/tests/10_rom_wordline_driver_array_test.py
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compiler/tests/05_rom_array_test.py → compiler/tests/14_rom_array_test.py
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0
compiler/tests/05_rom_control_logic_test.py → compiler/tests/16_rom_control_logic_test.py
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2
compiler/tests/05_rom_base_bank_1kB_test.py → compiler/tests/19_rom_bank_1kb_test.py
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@ -30,7 +30,7 @@ class rom_bank_test(openram_test):
rom_data = test_data, rom_data = test_data,
word_size = 1) word_size = 1)
a = factory.create(module_type="rom_base_bank", rom_config=conf) a = factory.create(module_type="rom_bank", rom_config=conf)
a.sp_write(OPTS.openram_temp + 'simulation_file.sp') a.sp_write(OPTS.openram_temp + 'simulation_file.sp')
self.local_check(a) self.local_check(a)

2
compiler/tests/05_rom_base_bank_4kB_test.py → compiler/tests/19_rom_bank_4kb_test.py
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@ -31,7 +31,7 @@ class rom_bank_test(openram_test):
rom_data = test_data, rom_data = test_data,
word_size = 2) word_size = 2)
a = factory.create(module_type="rom_base_bank", rom_config=conf) a = factory.create(module_type="rom_bank", rom_config=conf)
a.sp_write(OPTS.openram_temp + 'simulation_file.sp') a.sp_write(OPTS.openram_temp + 'simulation_file.sp')
self.local_check(a) self.local_check(a)

7
macros/rom_configs/sky130_rom_common.py Normal file
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@ -0,0 +1,7 @@
tech_name = "sky130"
nominal_corner_only = True
#route_supplies = "ring"
check_lvsdrc = True