diff --git a/compiler/modules/rom_base_bank.py b/compiler/modules/rom_bank.py
similarity index 100%
rename from compiler/modules/rom_base_bank.py
rename to compiler/modules/rom_bank.py
diff --git a/compiler/tests/05_rom_decoder_test.py b/compiler/tests/06_rom_decoder_test.py
similarity index 100%
rename from compiler/tests/05_rom_decoder_test.py
rename to compiler/tests/06_rom_decoder_test.py
diff --git a/compiler/tests/05_rom_column_mux_array_test.py b/compiler/tests/07_rom_column_mux_array_test.py
similarity index 100%
rename from compiler/tests/05_rom_column_mux_array_test.py
rename to compiler/tests/07_rom_column_mux_array_test.py
diff --git a/compiler/tests/05_rom_decoder_buffer_array_test.py b/compiler/tests/08_rom_decoder_buffer_array_test.py
similarity index 100%
rename from compiler/tests/05_rom_decoder_buffer_array_test.py
rename to compiler/tests/08_rom_decoder_buffer_array_test.py
diff --git a/compiler/tests/05_rom_precharge_array_test.py b/compiler/tests/08_rom_precharge_array_test.py
similarity index 100%
rename from compiler/tests/05_rom_precharge_array_test.py
rename to compiler/tests/08_rom_precharge_array_test.py
diff --git a/compiler/tests/05_rom_wordline_driver_array_test.py b/compiler/tests/10_rom_wordline_driver_array_test.py
similarity index 100%
rename from compiler/tests/05_rom_wordline_driver_array_test.py
rename to compiler/tests/10_rom_wordline_driver_array_test.py
diff --git a/compiler/tests/05_rom_array_test.py b/compiler/tests/14_rom_array_test.py
similarity index 100%
rename from compiler/tests/05_rom_array_test.py
rename to compiler/tests/14_rom_array_test.py
diff --git a/compiler/tests/05_rom_control_logic_test.py b/compiler/tests/16_rom_control_logic_test.py
similarity index 100%
rename from compiler/tests/05_rom_control_logic_test.py
rename to compiler/tests/16_rom_control_logic_test.py
diff --git a/compiler/tests/05_rom_base_bank_1kB_test.py b/compiler/tests/19_rom_bank_1kb_test.py
similarity index 91%
rename from compiler/tests/05_rom_base_bank_1kB_test.py
rename to compiler/tests/19_rom_bank_1kb_test.py
index be3fcb3a..f0a61dee 100644
--- a/compiler/tests/05_rom_base_bank_1kB_test.py
+++ b/compiler/tests/19_rom_bank_1kb_test.py
@@ -30,7 +30,7 @@ class rom_bank_test(openram_test):
                           rom_data = test_data,
                           word_size = 1)
 
-        a = factory.create(module_type="rom_base_bank", rom_config=conf)
+        a = factory.create(module_type="rom_bank", rom_config=conf)
         a.sp_write(OPTS.openram_temp + 'simulation_file.sp')
         self.local_check(a)
 
@@ -41,4 +41,4 @@ if __name__ == "__main__":
     (OPTS, args) = openram.parse_args()
     del sys.argv[1:]
     header(__file__, OPTS.tech_name)
-    unittest.main(testRunner=debugTestRunner())
\ No newline at end of file
+    unittest.main(testRunner=debugTestRunner())
diff --git a/compiler/tests/05_rom_base_bank_4kB_test.py b/compiler/tests/19_rom_bank_4kb_test.py
similarity index 91%
rename from compiler/tests/05_rom_base_bank_4kB_test.py
rename to compiler/tests/19_rom_bank_4kb_test.py
index b9a37a21..7fa2005d 100644
--- a/compiler/tests/05_rom_base_bank_4kB_test.py
+++ b/compiler/tests/19_rom_bank_4kb_test.py
@@ -31,7 +31,7 @@ class rom_bank_test(openram_test):
                           rom_data = test_data,
                           word_size = 2)
 
-        a = factory.create(module_type="rom_base_bank", rom_config=conf)
+        a = factory.create(module_type="rom_bank", rom_config=conf)
         a.sp_write(OPTS.openram_temp + 'simulation_file.sp')
         self.local_check(a)
 
@@ -42,4 +42,4 @@ if __name__ == "__main__":
     (OPTS, args) = openram.parse_args()
     del sys.argv[1:]
     header(__file__, OPTS.tech_name)
-    unittest.main(testRunner=debugTestRunner())
\ No newline at end of file
+    unittest.main(testRunner=debugTestRunner())
diff --git a/macros/rom_configs/sky130_rom_common.py b/macros/rom_configs/sky130_rom_common.py
new file mode 100644
index 00000000..40ebd414
--- /dev/null
+++ b/macros/rom_configs/sky130_rom_common.py
@@ -0,0 +1,7 @@
+
+tech_name = "sky130"
+nominal_corner_only = True
+
+#route_supplies = "ring"
+check_lvsdrc = True
+