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Rename test 14

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mrg
2020-06-10 16:41:26 -07:00
parent 0b4b5e7133
commit fdf92d0da1
1 changed files with 1 additions and 1 deletions
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compiler/tests/14_replica_bitcell_1rw_1r_array_test.py → compiler/tests/14_replica_bitcell_array_1rw_1r_test.py
+1 -1
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@@ -13,7 +13,7 @@ from globals import OPTS
from sram_factory import factory
import debug
class replica_bitcell_array_test(openram_test):
class replica_bitcell_array_1rw_1r_test(openram_test):
def runTest(self):
config_file = "{}/tests/configs/config".format(os.getenv("OPENRAM_HOME"))