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Removing multiport_check option that diabled multiport portion of unit tests. Adding multiport checks to several other modules.

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Michael Timothy Grimes
2018-09-12 20:22:12 -07:00
parent 42719b8ec2
commit f03cd7c3ba
11 changed files with 144 additions and 103 deletions
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compiler/tests/08_precharge_array_test.py
+14 -15
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@@ -18,25 +18,24 @@ class precharge_test(openram_test):
import precharge_array
import tech
# check precharge array in single port
debug.info(2, "Checking 3 column precharge")
pc = precharge_array.precharge_array(columns=3)
self.local_check(pc)
if OPTS.multiport_check:
debug.info(2, "Checking precharge array for pbitcell")
OPTS.bitcell = "pbitcell"
OPTS.num_rw_ports = 1
OPTS.num_r_ports = 1
OPTS.num_w_ports = 1
pc = precharge_array.precharge_array(columns=3, bitcell_bl="bl0", bitcell_br="br0")
self.local_check(pc)
pc = precharge_array.precharge_array(columns=3, bitcell_bl="bl1", bitcell_br="br1")
self.local_check(pc)
pc = precharge_array.precharge_array(columns=3, bitcell_bl="bl2", bitcell_br="br2")
self.local_check(pc)
# check precharge array in multi-port
OPTS.bitcell = "pbitcell"
OPTS.num_rw_ports = 1
OPTS.num_r_ports = 1
OPTS.num_w_ports = 1
debug.info(2, "Checking 3 column precharge array for pbitcell (innermost connections)")
pc = precharge_array.precharge_array(columns=3, bitcell_bl="bl0", bitcell_br="br0")
self.local_check(pc)
debug.info(2, "Checking 3 column precharge array for pbitcell (outermost connections)")
pc = precharge_array.precharge_array(columns=3, bitcell_bl="bl2", bitcell_br="br2")
self.local_check(pc)
globals.end_openram()