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make split wl specific to each port

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This commit is contained in:
jcirimel
2020-09-23 00:08:34 -07:00
parent fb6a665514
commit efdc171b14
12 changed files with 74 additions and 46 deletions
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compiler/base/custom_cell_properties.py
+1 -1
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@@ -175,7 +175,7 @@ class cell_properties():
def bitcell_array(self):
return self._bitcell_array
def use_custom_bitcell_array(self, port_list):
def compare_ports(self, port_list):
use_custom_arrangement = False
for ports in port_list:
if ports == "{}R_{}W_{}RW".format(OPTS.num_r_ports, OPTS.num_w_ports, OPTS.num_rw_ports):