mirror of
https://github.com/VLSIDA/OpenRAM.git
synced 2026-09-03 08:27:11 +02:00
Change is_unit_test to False by default
This commit is contained in:
@@ -19,7 +19,7 @@ class write_driver_pbitcell_test(openram_test):
|
||||
|
||||
def runTest(self):
|
||||
config_file = "{}/tests/configs/config".format(os.getenv("OPENRAM_HOME"))
|
||||
globals.init_openram(config_file)
|
||||
globals.init_openram(config_file, is_unit_test=True)
|
||||
|
||||
# check write driver array for multi-port
|
||||
OPTS.bitcell = "pbitcell"
|
||||
|
||||
Reference in New Issue
Block a user