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Fix pdriver width error

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This commit is contained in:
Matt Guthaus
2019-01-25 10:26:31 -08:00
parent 8f56953af0
commit ddf734891a
3 changed files with 7 additions and 5 deletions
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compiler/modules/control_logic.py
+3 -1
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@@ -86,7 +86,9 @@ class control_logic(design.design):
# Special gates: inverters for buffering
# clk_buf drives a flop for every address and control bit
clock_fanout = math.log(self.num_words,2) + math.log(self.words_per_row,2)+1 + self.num_control_signals
# plus about 5 fanouts for the control logic
clock_fanout = math.log(self.num_words,2) + math.log(self.words_per_row,2) \
+ self.num_control_signals + 5
self.clkbuf = factory.create(module_type="pdriver",
fanout=clock_fanout,
height=dff_height)
compiler/modules/wordline_driver.py
+2 -2
View File
@@ -231,8 +231,8 @@ class wordline_driver(design.design):
stage_effort_list.append(stage1)
last_stage_is_rise = stage1.is_rise
stage2 = self.inv.get_stage_effort(external_cout, last_stage_is_rise)
stage_effort_list.append(stage2)
stage2 = self.inv.get_stage_efforts(external_cout, last_stage_is_rise)
stage_effort_list.extend(stage2)
return stage_effort_list