mirror of https://github.com/VLSIDA/OpenRAM.git
Simplify write mask supply via logic
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@ -134,10 +134,7 @@ class write_mask_and_array(design.design):
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for supply in ["gnd", "vdd"]:
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supply_pin=self.and2_insts[i].get_pin(supply)
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if "li" in layer:
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self.add_power_pin(supply, supply_pin.center(), start_layer="li", directions=("H", "H"))
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else:
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self.add_power_pin(supply, supply_pin.center())
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self.add_power_pin(supply, supply_pin.center(), start_layer=supply_pin.layer)
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for supply in ["gnd", "vdd"]:
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supply_pin_left = self.and2_insts[0].get_pin(supply)
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