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Fix missing via in wmask driver

This commit is contained in:
mrg 2020-07-01 14:44:18 -07:00
parent c340870ba0
commit 8cd1cba818
1 changed files with 9 additions and 8 deletions
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17
compiler/modules/port_data.py
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@ -377,11 +377,11 @@ class port_data(design.design):
temp.append("{0}_{1}".format(br_name, bit))
else:
temp.append("{0}_out_{1}".format(bl_name, bit))
temp.append("{0}_out_{1}".format(br_name, bit))
temp.append("{0}_out_{1}".format(br_name, bit))
for bit in range(self.num_spare_cols):
for bit in range(self.num_spare_cols):
temp.append("spare{0}_{1}".format(bl_name, bit))
temp.append("spare{0}_{1}".format(br_name, bit))
temp.append("spare{0}_{1}".format(br_name, bit))
if self.write_size is not None:
for i in range(self.num_wmasks):
@ -522,13 +522,14 @@ class port_data(design.design):
wdriver_pos = wdriver_en_pin.rc() - vector(self.m2_pitch, 0)
mid_pos = vector(wdriver_pos.x, wmask_pos.y)
# Add driver on mask output
self.add_via_center(layers=self.m1_stack,
offset=wmask_pos)
self.add_via_stack_center(from_layer=wmask_out_pin.layer,
to_layer="m1",
offset=wmask_pos)
# Add via for the write driver array's enable input
self.add_via_center(layers=self.m1_stack,
offset=wdriver_pos)
self.add_via_stack_center(from_layer=wdriver_en_pin.layer,
to_layer="m2",
offset=wdriver_pos)
# Route between write mask AND array and write driver array
self.add_wire(self.m1_stack, [wmask_pos, mid_pos, wdriver_pos])