From bed2e36550d15f34a6ec9a8815a50e79c21d0f14 Mon Sep 17 00:00:00 2001 From: mrg Date: Wed, 1 Jul 2020 14:44:48 -0700 Subject: [PATCH] Simplify write mask supply via logic --- compiler/modules/write_mask_and_array.py | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/compiler/modules/write_mask_and_array.py b/compiler/modules/write_mask_and_array.py index c87d3a90..d48aefef 100644 --- a/compiler/modules/write_mask_and_array.py +++ b/compiler/modules/write_mask_and_array.py @@ -134,10 +134,7 @@ class write_mask_and_array(design.design): for supply in ["gnd", "vdd"]: supply_pin=self.and2_insts[i].get_pin(supply) - if "li" in layer: - self.add_power_pin(supply, supply_pin.center(), start_layer="li", directions=("H", "H")) - else: - self.add_power_pin(supply, supply_pin.center()) + self.add_power_pin(supply, supply_pin.center(), start_layer=supply_pin.layer) for supply in ["gnd", "vdd"]: supply_pin_left = self.and2_insts[0].get_pin(supply)