Added corner paramters to power functions. This commit does not compile (sorry)

compiler/modules/control_logic.py

@@ -97,7 +97,7 @@ class control_logic(design.design):
 
         # GAP between main control and replica bitline
         self.replica_bitline_gap = 2*self.m2_pitch
-
+        
 
 
     def add_modules(self):
@@ -691,7 +691,10 @@ class control_logic(design.design):
     def analytical_power(self, vdd, temp, load):
         #This has yet to be fully determined. 
         print "Instances:"
+        total_power = self.return_power() #empty power object
         for inst in self.insts:
             print inst.name," Instance"
+            total_power += inst.mod.analytical_power(vdd, temp, load)
+            
         #currently, only return flop array power
-        return 0
+        return total_power

compiler/modules/ms_flop.py

@@ -27,8 +27,11 @@ class ms_flop(design.design):
         result = self.return_delay(spice["msflop_delay"], spice["msflop_slew"])
         return result
         
-    def analytical_power(self, slew, load = 0.0):
+    def analytical_power(self, vdd, temp, load):
         #Value taken from tech file.
         from tech import spice
-        return spice["msflop_power"]
+        return self.return_power()
+        #return spice["msflop_power"]
 
+        
+        

compiler/modules/ms_flop_array.py

@@ -135,5 +135,5 @@ class ms_flop_array(design.design):
     def analytical_delay(self, slew, load=0.0):
         return self.ms.analytical_delay(slew=slew, load=load)
         
-    def analytical_power(self, slew, load):
-        return self.columns * self.ms.analytical_power(slew=slew, load=load)
+    # def analytical_power(self, vdd, temp, load):
+        # return self.columns * self.ms.analytical_power(slew=slew, load=load)

compiler/modules/replica_bitline.py

@@ -344,3 +344,14 @@ class replica_bitline(design.design):
                            height=pin.height(),
                            width=pin.width())
 
+
+    # def analytical_power(self, vdd, temp, load):
+        # #This has yet to be fully determined. 
+        # print "Instances:"
+        # total_power = 0
+        # for inst in self.insts:
+            # print inst.name," Instance"
+            # #total_power += inst.mod.analytical_power(vdd, temp, load)
+            
+        # #currently, only return flop array power
+        # return total_power