From a3e271f6fbc05ef0635c06cd98a637772536df74 Mon Sep 17 00:00:00 2001 From: Jacob Walker Date: Thu, 1 Sep 2022 20:06:48 -0700 Subject: [PATCH] reoriented cell and added tap cell --- compiler/modules/ptx.py | 7 ++- compiler/modules/rom_base_array.py | 91 ++++++++++++++++++------------ compiler/modules/rom_base_cell.py | 6 +- compiler/modules/rom_dummy_cell.py | 63 ++++++++++++--------- compiler/modules/rom_poly_tap.py | 54 ++++++++++++++++++ 5 files changed, 152 insertions(+), 69 deletions(-) create mode 100644 compiler/modules/rom_poly_tap.py diff --git a/compiler/modules/ptx.py b/compiler/modules/ptx.py index bc36f064..250cd3f6 100644 --- a/compiler/modules/ptx.py +++ b/compiler/modules/ptx.py @@ -39,7 +39,8 @@ class ptx(design): connect_drain_active=False, connect_source_active=False, connect_poly=False, - num_contacts=None): + num_contacts=None, + ): if "li" in layer: self.route_layer = "li" @@ -47,11 +48,11 @@ class ptx(design): self.route_layer = "m1" # Default contacts are the lowest layer - if not add_source_contact: + if add_source_contact == None: add_source_contact = self.route_layer # Default contacts are the lowest layer - if not add_drain_contact: + if add_drain_contact == None: add_drain_contact = self.route_layer # We need to keep unique names because outputting to GDSII diff --git a/compiler/modules/rom_base_array.py b/compiler/modules/rom_base_array.py index e86c9cd6..784e2595 100644 --- a/compiler/modules/rom_base_array.py +++ b/compiler/modules/rom_base_array.py @@ -31,15 +31,16 @@ class rom_base_array(bitcell_base_array): def create_netlist(self): self.add_modules() self.add_pins() - + self.create_instances() - + self.create_taps() def create_layout(self): #self.add_layout_pins() self.place_ptx() - - #self.route_horizontal_pins(insts=self.cell_inst.values(), layer=self.route_layer, name="S") + self.place_tap(self.column_size) + self.place_tap(0) + #self.route_horizo ntal_pins(insts=self.cell_inst.values(), layer=self.route_layer, name="S") #self.route_bitlines() #self.route_wordlines() @@ -51,63 +52,72 @@ class rom_base_array(bitcell_base_array): #def add_pins(self): def add_boundary(self): - self.width = self.cell.width * self.column_size - self.height = self.cell.height * self.row_size + self.width = self.dummy.width * self.column_size + self.height = self.dummy.height * self.row_size super().add_boundary() def add_modules(self): # base cell, nmos tx that represents a 1 - self.cell = factory.create(module_type="rom_base_cell") + self.dummy = factory.create(module_type="rom_dummy_cell", route_layer=self.route_layer) # "dummy" cells represent 0 #dummy cell with no contacts - self.dummy_nc = factory.create(module_type="rom_dummy_cell") + self.cell_nc = factory.create(module_type="rom_base_cell") #dummy cell with drain contact - self.dummy_dc = factory.create(module_type="rom_dummy_cell", drain_contact=True) + self.cell_dc = factory.create(module_type="rom_base_cell", add_drain_contact=self.route_layer) #dummy cell with source contact - self.dummy_sc = factory.create(module_type="rom_dummy_cell", source_contact=True) + self.cell_sc = factory.create(module_type="rom_base_cell", add_source_contact=self.route_layer) #dummy cell with all contacts - self.dummy_ac = factory.create(module_type="rom_dummy_cell", source_contact=True, drain_contact=True) + self.cell_ac = factory.create(module_type="rom_base_cell", add_source_contact=self.route_layer, add_drain_contact=self.route_layer) + + self.poly_tap = factory.create(module_type="rom_poly_tap") + + + def create_taps(self): + self.tap_inst = {} + for() + + def create_instances(self): self.cell_inst = {} self.cell_list = [] self.current_row = 0 + + #When rotated correctly rows are bit lines for row in range(self.row_size): row_list = [] + + #when rotated correctly cols are word lines for col in range(self.column_size): name = "bit_r{0}_c{1}".format(row, col) if(self.data[row][col] == 1): - self.cell_inst[row, col]=self.add_inst(name=name, - mod=self.cell) - - - self.connect_inst(["vdd", "gnd", "gnd"]) - else: + if row < self.row_size - 1 and row > 0 and self.data[row + 1][col] == 0 and self.data[row - 1][col] == 0: + self.cell_inst[row, col]=self.add_inst(name=name, mod=self.cell_ac) - if col < self.column_size - 1 and col > 0 and self.data[row][col + 1] == 1 and self.data[row][col - 1] == 1: - - self.cell_inst[row, col]=self.add_inst(name=name, mod=self.dummy_ac) + elif row > 0 and self.data[row - 1][col] == 0: + self.cell_inst[row, col]=self.add_inst(name=name, mod=self.cell_sc) - elif col > 0 and self.data[row][col - 1] == 1: - self.cell_inst[row, col]=self.add_inst(name=name, mod=self.dummy_dc) - - elif col < self.column_size - 1 and self.data[row][col + 1] == 1: - - self.cell_inst[row, col]=self.add_inst(name=name, mod=self.dummy_sc) + elif row < self.row_size - 1 and self.data[row + 1][col] == 0: + self.cell_inst[row, col]=self.add_inst(name=name, mod=self.cell_dc) else: - self.cell_inst[row, col]=self.add_inst(name=name, mod=self.dummy_nc) - - + self.cell_inst[row, col]=self.add_inst(name=name, mod=self.cell_nc) + self.connect_inst(["vdd", "gnd", "gnd"]) + + else: + + self.cell_inst[row, col]=self.add_inst(name=name, + mod=self.dummy) self.connect_inst([]) + row_list.append(self.cell_inst[row, col]) self.cell_list.append(row_list) @@ -120,6 +130,19 @@ class rom_base_array(bitcell_base_array): # Make a flat list too self.all_bitline_names = [x for sl in zip(*self.bitline_names) for x in sl] + def place_tap(self, col): + + self.tap_pos = {} + for row in range(self.row_size): + + tap_x = self.dummy.width * (col_offset) + tap_y = self.dummy.height * row + + self.tap_pos[row, col] = vector(tap_x, tap_y) + self.tap_inst[row, col].place(self.tap_pos[row, col]) + + + def place_ptx(self): self.cell_pos = {} @@ -129,11 +152,11 @@ class rom_base_array(bitcell_base_array): # columns are word lines for col in range(self.column_size): - cell_x = (self.cell.width) * col - cell_y = row * (self.cell.height) + cell_x = (self.dummy.width) * col + cell_y = row * (self.dummy.height) self.cell_pos[row, col] = vector(cell_x, cell_y) - self.cell_inst[row, col].place(self.cell_pos[row, col]) + self.cell_inst[row, col].place(self.cell_pos[row, col], rotate=90) #cell_x = self.cell.width * col #cell_y = self.cell.height * row #print(self.nmos.height + self.nmos.poly_extend_active) @@ -242,7 +265,3 @@ class rom_base_array(bitcell_base_array): bitcell_pins.append("gnd") return bitcell_pins - - - - diff --git a/compiler/modules/rom_base_cell.py b/compiler/modules/rom_base_cell.py index 5c454619..cc9a8017 100644 --- a/compiler/modules/rom_base_cell.py +++ b/compiler/modules/rom_base_cell.py @@ -19,8 +19,8 @@ from tech import drc class rom_base_cell(rom_dummy_cell): - def __init__(self, name="", cell_name=None): - super().__init__(name, cell_name) + def __init__(self, name="", cell_name=None, add_source_contact=False, add_drain_contact=False, route_layer="m1"): + super().__init__(name, cell_name, add_source_contact, add_drain_contact, route_layer) #self.route_layer= route_layer #self.create_netlist() #self.create_layout() @@ -52,7 +52,7 @@ class rom_base_cell(rom_dummy_cell): def create_nmos(self): self.cell_inst = self.add_inst( name=self.name, mod=self.nmos, - rotate=90) + ) self.connect_inst(["bl_h", "wl", "bl_l", "gnd"]) diff --git a/compiler/modules/rom_dummy_cell.py b/compiler/modules/rom_dummy_cell.py index 0ef5c97f..6160cfb1 100644 --- a/compiler/modules/rom_dummy_cell.py +++ b/compiler/modules/rom_dummy_cell.py @@ -17,11 +17,11 @@ from tech import drc class rom_dummy_cell(design): - def __init__(self, name="", cell_name=None, source_contact=False, drain_contact=False): + def __init__(self, name="", cell_name=None, add_source_contact=False, add_drain_contact=False, route_layer="m1"): super().__init__(name, cell_name) - self.route_layer = "m1" - self.source_contact=source_contact - self.drain_contact=drain_contact + self.route_layer = route_layer + self.add_source_contact=add_source_contact + self.add_drain_contact=add_drain_contact self.create_netlist() self.create_layout() @@ -42,17 +42,10 @@ class rom_dummy_cell(design): self.add_boundary() self.add_poly() self.add_metal() - #poly_offset = - # vector(0.5 * self.nmos.active_contact.width + 0.5 * self.nmos.poly_width + self.nmos.active_contact_to_gate, 0) - - #self.add_rect( layer="poly", - # offset=poly_offset, - # height=self.nmos.height + self.nmos.poly_extend_active, - # width=self.nmos.poly_width - # ) + print(self.height) + print(self.width) self.add_label("0,0", self.route_layer) - #self.add_wire( layers=self.route_layer) - #self.add_rect( layer=self.route_layer) + @@ -73,17 +66,21 @@ class rom_dummy_cell(design): self.cell_diffusion_offset = ((self.base_width - 2 * self.active_enclose_contact - self.nmos.contact_width) - drc("active_to_active")) * 0.5 + # width offset to account for poly-active spacing between base and dummy cells on the same bitline self.poly_active_offset = 0.5 * (self.base_width - 2 * self.cell_diffusion_offset - (self.poly_width + 2 * self.active_enclose_contact + self.nmos.contact_width)) - self.poly_to_active + #so that the poly taps are far enough apart + self.poly_tap_offset = (self.base_width - self.cell_diffusion_offset - self.poly_contact.width - self.poly_active_offset) - drc("poly_to_poly") + def add_boundary(self): - #cell height with offsets applied - self.height = self.nmos.height + self.poly_extend_active_spacing + 2 * self.nmos.poly_extend_active + #cell width with offsets applied, height becomes width when the cells are rotated + self.width = self.nmos.height + self.poly_extend_active_spacing + 2 * self.nmos.poly_extend_active - # cell width with offsets applied, if the offsets are positive (greater than 0) they are not applied - self.width = self.base_width - min(self.cell_diffusion_offset, 0) - min(self.poly_active_offset, 0) + # cell height with offsets applied, width becomes height when the cells are rotated, if the offsets are positive (greater than 0) they are not applied + self.height = self.base_width - min(self.cell_diffusion_offset, 0) - min(self.poly_active_offset, 0) - min(self.poly_tap_offset, 0) super().add_boundary() @@ -93,22 +90,23 @@ class rom_dummy_cell(design): poly_x = 0.5 * self.nmos.contact_width + self.contact_to_gate - self.add_rect("poly", vector(poly_x, 0), self.poly_width, self.height) + self.poly = self.add_rect("poly", vector(poly_x, 0), self.poly_width, self.nmos.poly_height + self.poly_extend_active_spacing) + print(self.poly_width, self.height) def add_metal(self): wire_x = min(self.cell_diffusion_offset, 0) + min(self.poly_active_offset, 0) - wire_y = 0.5 * (self.height - self.poly_extend_active_spacing) + wire_y = 0.5 * (self.width - self.poly_extend_active_spacing) wire_start = vector( wire_x, wire_y ) - wire_end = vector(self.width, wire_y) + wire_end = vector(self.height, wire_y) - if self.route_layer == 'm1': + # if self.route_layer == 'm1': - if self.drain_contact: - self.add_via_center(self.li_stack, [wire_x, wire_y]) - if self.source_contact: - self.add_via_center(self.li_stack, [self.width, wire_y]) + # if self.drain_contact: + # self.add_via_center(self.li_stack, [wire_x, wire_y]) + # if self.source_contact: + # self.add_via_center(self.li_stack, [self.width, wire_y]) self.add_path(self.route_layer, [wire_start, wire_end]) @@ -118,8 +116,19 @@ class rom_dummy_cell(design): def add_nmos(self): #used only for layout constants + # if not self.source_contact: + # add_source = False + # else: + # add_source = self.route_layer + + # if not self.drain_contact: + # add_drain = False + # else: + # add_drain = self.route_layer self.nmos = factory.create(module_type="ptx", - tx_type="nmos" + tx_type="nmos", + add_source_contact=self.add_source_contact, + add_drain_contact=self.add_drain_contact ) diff --git a/compiler/modules/rom_poly_tap.py b/compiler/modules/rom_poly_tap.py new file mode 100644 index 00000000..4f769eb7 --- /dev/null +++ b/compiler/modules/rom_poly_tap.py @@ -0,0 +1,54 @@ + + +from base import design +from base import vector +from sram_factory import factory + +class rom_poly_tap(design): + + def __init__(self, name, strap_length=0, cell_name=None, prop=None, strap_layer="m2"): + super().__init__(name, cell_name, prop) + self.strap_layer=strap_layer + self.length = strap_length + self.create_netlist() + self.create_layout() + + def create_netlist(self): + + + #for layout constants + self.dummy = factory.create(module_type="rom_dummy_cell") + pass + + def create_layout(self): + + self.place_via() + self.add_boundary() + if self.length < 0: + self.place_strap(self.length) + + def add_boundary(self): + self.height = self.dummy.height + self.width = self.poly_contact.width + super().add_boundary() + + def place_via(self): + + contact_width = self.poly_contact.width + + contact_x = contact_width * 0.5 + contact_y = self.dummy.poly.offset.x + (self.poly_width * 0.5) + + contact_offset = vector(contact_x, contact_y) + self.via = self.add_via_stack_center(from_layer="poly", + to_layer=self.strap_layer, + offset=contact_offset) + + def place_strap(self, length): + + strap_start = vector(self.via.cx(), self.via.cy()) + + strap_end = vector( self.dummy.width * length, self.via.cy()) + + self.strap = self.add_path(self.strap_layer, (strap_start, strap_end)) +